GAA Transistor Isolation Structure for Lower Source/Drain Resistance

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Solution Overview

Problem

As minimum feature size reduces in semiconductor devices, the resistance of source/drain features increases, affecting device performance.

Innovation Solution

The implementation of gate all around (GAA) transistor structures, patterned using photolithography and self-aligned processes, with semiconductor channel layers and sacrificial layers formed over a substrate, followed by replacement of dummy gate structures with metal gate structures and formation of isolation structures, reducing resistance through epitaxial source/drain structures and dielectric materials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If minimum feature size is reduced to increase integration density, then more components can be integrated into a given chip area, but resistance of source/drain features increases affecting device performance

Engineering Contradiction:

Improveintegration densityVSAvoiddevice performance

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent changes the physical and chemical parameters of the source/drain structures by forming epitaxial semiconductor layers with different compositions (e.g., SiGe vs Si), doping concentrations, and crystal orientations. These parameter changes enable lower resistance in scaled devices while maintaining the reduced feature sizes needed for high integration density

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent employs composite material structures where source/drain regions are formed using multiple semiconductor materials with different properties (such as Si/SiGe heterostructures). This allows optimization of electrical properties (lower resistance) in specific regions while maintaining the geometric constraints required for high integration density

Inventive Principle:

Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces resistance and enhances device performance by optimizing the semiconductor structure, allowing for improved integration density and functionality.

Implementation Method 1

patterned using photolithography and self-aligned processes

Methodology Applied

Scientific EffectPhotolithography: Photopolymerisation

Implementation Method 2

reducing resistance through epitaxial source/drain structures

Methodology Applied

Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS20250349596A1Semiconductor device and method for forming the same

Publication Date: 2025.11.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor device includes a substrate, a transistor over the substrate, and a first isolation structure adjacent to the transistor. The transistor includes a channel layer extending along a first direction, a gate structure over the channel layer and extending along a second direction substantially perpendicular to the first direction, and source/drain structures on opposite ends of the channel layer. In a top view, the first isolation structure includes a first extension portion and a second extension portion extending along the first direction, and a connection portion extending along the second direction and connecting with the first extension portion and the second extension portion.