Gate-All-Around Transistors on (110) Substrates for Higher Hole Mobility
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving high carrier mobility, particularly for p-channel devices, due to strain issues when formed on (100) substrates, which degrades transistor performance.
Innovation Solution
Forming semiconductor devices on substrates with a (110) crystallographic surface orientation, using unstrained SiGe or GeSn nanoribbons for p-channel transistors and Si nanoribbons for n-channel transistors, which enhances hole mobility and overall CMOS cell performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If semiconductor devices are formed on (100) substrates using gate-all-around architectures, then transistor density is increased, but carrier mobility deteriorates due to strain
Solution Approach 1:
The patent changes the substrate crystallographic orientation parameter from (100) to (110), which fundamentally alters the strain characteristics of the semiconductor channel. This parameter change enables unstrained SiGe nanoribbons to achieve superior hole mobility while maintaining the gate-all-around architecture for high transistor density
Solution Approach 2:
The patent employs composite material structures including alternating layers of SiGe and Si, or GeSn and Si, forming nanoribbons with specific crystallographic orientations. These composite structures enable simultaneous achievement of high carrier mobility through material composition optimization and high density through architectural design
2Reliability
If unstrained SiGe nanoribbons are used for p-channel devices, then hole mobility is improved, but device complexity increases due to alternative substrate orientation
Solution Approach 1:
By changing the substrate orientation parameter to (110), the patent enables direct growth of unstrained SiGe nanoribbons that naturally achieve superior hole mobility without requiring additional strain engineering steps, thus improving reliability while managing complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves p-channel performance and overall hybrid channel performance by increasing hole mobility, despite lower electron mobility in n-channel devices, resulting in enhanced transistor performance.
Implementation Method 1
a substrate having a (110) crystallographic surface orientation, a semiconductor device on the substrate and having one or more bodies of semiconductor material extending in a first direction from a source region to a drain region
Data Source
AI summary
Semiconductor devices on a substrate with an alternative crystallographic surface orientation. Example devices includes gate-all-around (e.g., nanoribbon and nanosheet) and forksheet transistors. In an example, a substrate having a (110) crystallographic surface orientation forms the basis for the growth of alternating silicon germanium (SiGe) or germanium tin (GeSn) and silicon (Si) semiconductor layers. P-channel transistors may be formed using SiGe or GeSn nanoribbons while n-channel transistors are formed from Si nanoribbons. The crystallographic surface orientation of the SiGe or GeSn nanoribbons will reflect the same crystallographic surface orientation of the substrate, which leads to a higher hole mobility across the SiGe or GeSn nanoribbons and improved device performance.