GaN Substrate Dislocation Reduction via Eu Doping

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current methods for producing nitride semiconductor substrates with low threading dislocation density on inexpensive base materials like sapphire are costly and inefficient, limiting the size and area of high-performance semiconductor devices.

Innovation Solution

A stacked structure of undoped GaN and Eu-doped GaN layers is used, where Eu is introduced as a doping element to bend threading dislocations, reducing their density to 10^6 cm^-2 or less, allowing for larger substrate areas without warpage, using metalorganic vapor phase epitaxy without removing the base material.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the thickness of the nitride semiconductor layer is increased to reduce threading dislocation density, then the threading dislocation density is reduced, but warpage occurs at the interface with the base material due to thermal expansion coefficient difference

Engineering Contradiction:
Improvethreading dislocation densityVSAvoidwarpage
Core Design Contradiction:
Manufacturing precisionVSShape

Solution Approach 1:

The nitride semiconductor layer is segmented into multiple thin layers (first nitride layer, second nitride layer, third nitride layer) with an aluminum nitride layer in between. This segmentation reduces the cumulative thickness while maintaining dislocation filtering capability, preventing warpage caused by excessive thickness and thermal expansion mismatch.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The aluminum nitride layer acts as an intermediary between the gallium nitride layers. It has different thermal expansion properties and mechanical strength, serving as a buffer that reduces stress accumulation and prevents warpage while still allowing dislocation propagation control.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If a selective area growth mask is used to form low threading dislocation density regions, then the threading dislocation density is reduced, but the process becomes complicated and production efficiency decreases

Engineering Contradiction:
Improvethreading dislocation densityVSAvoidproduction efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The invention removes the selective area growth mask step entirely. Instead of using masks to define growth regions, the patent uses a planar multi-layer structure where dislocation reduction occurs uniformly across the entire substrate surface, eliminating mask fabrication, alignment, and removal steps.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of using top-down mask patterning to create low dislocation regions, the invention uses bottom-up layer-by-layer growth where each interface naturally filters dislocations. The approach inverts the conventional methodology by relying on vertical layering rather than horizontal patterning.

Inventive Principle:
Principle #13The other way round (Inversion)

3Manufacturing precision

If selective area growth mask is used, then threading dislocation density is reduced in patterned regions, but the low threading dislocation density region is scattered and the substrate area is limited

Engineering Contradiction:
Improvethreading dislocation densityVSAvoidsubstrate area
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The multi-layer nitride structure serves multiple functions simultaneously: it reduces threading dislocations, maintains large substrate area coverage, enables continuous production, and works with standard sapphire substrates. The structure is universally applicable across the entire substrate surface rather than being limited to patterned regions.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the production of nitride semiconductor substrates with significantly reduced threading dislocation density, suitable for high-performance devices, while maintaining low production costs and increasing substrate size effectively.

Implementation Method 1

Eu is introduced as a doping element to bend threading dislocations, reducing their density to 10^6 cm^-2 or less

Methodology Applied
Scientific EffectDoping: Dopants

Implementation Method 2

using metalorganic vapor phase epitaxy without removing the base material

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Implementation Method 3

metalorganic vapor phase epitaxy

Methodology Applied
Scientific EffectVapor phase deposition: Physical Vapour Deposition

Implementation Method 4

because of difference in thermal expansion coefficient between the base material such as sapphire and the nitride such as GaN, the method has a problem that warpage occurs

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS11133435B2Nitride semiconductor substrate, manufacturing method therefor, and semiconductor device
Publication Date: 2021.09.28 THE RITSUMEIKAN TRUST
  • US11133435B2 patent drawing
  • US11133435B2 patent drawing
  • US11133435B2 patent drawing

AI summary

Provided is a technique for manufacturing a nitride semiconductor substrate with which it is possible to manufacture a nitride semiconductor substrate having sufficiently reduced dislocation density with a large area even if manufactured on an inexpensive substrate made of sapphire, etc. A nitride semiconductor substrate in which a nitride semiconductor layer formed on a substrate is formed by laminating an undoped nitride layer and a rare earth element-added nitride layer to which a rare earth element is added as a doping material, and the dislocation density is of the order of 106 cm−2 or less. A method for manufacturing a nitride semiconductor substrate in which a step for growing GaN, InN, AlN, or a mixed crystal of two or more thereof on a substrate to form an undoped nitride layer, and a step for forming a rare earth element-added nitride layer to which a rare earth element is added so as to be substituted for Ga, In, or Al are performed via a series of formation steps using an organic metal vapor epitaxial technique at a temperature of 900 to 1200° C. without extraction from a reaction vessel.