GaN Field-Effect Transistor with Carbon-Doped Trap Layer
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Solution Overview
Problem
Conventional field-effect transistors experience current collapse and increased leakage current when switching from an OFF to an ON state, due to electron trapping and reduced channel conductivity, which affects their reliability and operational efficiency.
Innovation Solution
A field-effect transistor design incorporating a first semiconductor layer with high carbon impurity concentration and a second semiconductor layer with a thickness of at least 0.75 μm, separated from the channel region, to trap electrons and prevent current collapse, while maintaining low leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional field-effect transistor structure is used, then the device can operate as a standard transistor, but current collapse occurs and leakage current increases when switching from OFF to ON state
Solution Approach 1:
The semiconductor structure is segmented into multiple distinct layers: a first semiconductor layer containing carbon impurities for electron trapping, a second semiconductor layer with reduced carbon impurities forming the channel, and a third semiconductor layer with wider bandgap. This segmentation separates the electron trapping function from the conduction function, allowing the transistor to reduce leakage current while maintaining reliable operation without current collapse.
2Use of energy by moving object
If the transistor is turned OFF to reduce power consumption, then energy savings are achieved, but electron trapping occurs leading to increased ON-state resistance when turned back ON
Solution Approach 1:
The harmful electron trapping effect is extracted and isolated to a dedicated first semiconductor layer that is physically separated from the second semiconductor layer forming the conduction channel. By removing the trapping mechanism from the channel region and confining it to a separate layer, the transistor can be turned OFF for power savings without the trapped electrons degrading the channel conductivity when turned back ON.
3Object-generated harmful factors
If a thicker semiconductor layer is used to reduce leakage current, then leakage current is reduced, but device complexity and manufacturing difficulty increase
Solution Approach 1:
Different regions of the semiconductor structure are assigned different local qualities: the first semiconductor layer has high carbon impurity concentration for electron trapping, the second semiconductor layer has reduced carbon impurities for low-resistance conduction, and the third semiconductor layer has wider bandgap for additional leakage suppression. This local differentiation allows each layer to perform its specific function optimally, reducing leakage current through the combined effect of the layered structure rather than requiring uniform thickening of the entire device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces leakage current and suppresses current collapse, enhancing the reliability and operational efficiency of the transistor by separating the trap layer from the channel region, thus maintaining stable conductivity during switching states.
Implementation Method 1
a first semiconductor layer made of a first nitride semiconductor and stacked on a substrate; a second semiconductor layer made of a second nitride semiconductor and formed on the first semiconductor layer... The first semiconductor layer includes carbon (C) and Si as impurity elements. An impurity concentration of carbon (C) in the first semiconductor layer is equal to or higher than 5×10^17/cm³
Implementation Method 2
in a heterostructure of AlGaN/GaN formed on a substrate whose main surface is the (0001) plane, two-dimensional electron gas (hereinafter referred to as the 2 DEG) is generated at the heterointerface by the spontaneous polarization and the piezoelectric polarization
Implementation Method 3
two-dimensional electron gas (hereinafter referred to as the 2 DEG) is generated at the heterointerface by the spontaneous polarization and the piezoelectric polarization
Implementation Method 4
a third semiconductor layer made of a third nitride semiconductor with a wider band gap than the second nitride semiconductor and formed on the second semiconductor layer... This enables a reduction in leakage current when the field-effect transistor is turned OFF
Data Source
AI summary
A field-effect transistor includes a codoped layer made of AlxGa1-xN (0≦x≦1) and formed on a p-type Si substrate, a GaN layer formed on the codoped layer, and an AlGaN layer formed on the GaN layer. The codoped layer contains C and Si as impurity elements. The impurity concentration of C in the codoped layer is equal to or higher than 5×1017/cm3. The impurity concentration of Si in the codoped layer is lower than the impurity concentration of C. The impurity concentration of C in the GaN layer is equal to or lower than 1×1017/cm3. The thickness of the GaN layer is equal to or greater than 0.75 μm.