GaN FET Recessed Gate for Uniform Electron Gas
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Solution Overview
Problem
Conventional enhancement (normally off) type field effect transistors employing nitride semiconductor materials face high ON-resistance due to uneven two-dimensional electron gas distribution and poor control over threshold bias, primarily attributed to threading dislocations and non-uniform etching processes, leading to increased power consumption and variability in threshold voltages.
Innovation Solution
A field effect transistor design featuring a channel layer with a first and second electron-supplying layer, an etch stop layer, and a recess structure where the gate electrode is buried, allowing for uniform two-dimensional electron gas distribution and precise control over the threshold bias through a combination of dry and wet etching processes, reducing ON-resistance and variability in threshold voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a recessed structure is formed in the electron-supplying layer to achieve normally off condition, then the device can operate without negative DC bias power source, but the ON-resistance increases due to non-uniform two-dimensional electron gas distribution
Solution Approach 1:
The patent applies local quality by creating a recessed structure only in the gate region while maintaining the full thickness of the electron-supplying layer in the source and drain regions. This localized modification allows the gate to deplete electrons underneath it (achieving normally off operation) while preserving uniform electron gas distribution in the source and drain contact regions, thereby maintaining low ON-resistance.
2Ease of manufacture
If conventional etching processes are used to form the recessed structure, then manufacturing is simpler, but the threshold bias control becomes poor due to non-uniform etching
Solution Approach 1:
The patent segments the etching process into two distinct stages: a dry etching step to form the initial recessed structure, followed by a wet etching step to precisely define the final recess depth and shape. This segmentation allows each process to be optimized independently - dry etching for structure formation and wet etching for precise threshold bias control through uniform material removal.
Solution Approach 2:
The patent introduces an intermediary aluminum nitride layer between the gallium nitride channel layer and the electron-supplying layer. This intermediary layer serves as an etch stop layer that provides a clear visual and physical boundary during etching, enabling precise control of the recess depth and ensuring uniform threshold bias across the device.
3Adaptability or versatility
If the electron-supplying layer thickness is reduced in the gate region to achieve normally off condition, then enhancement type operation is achieved, but the two-dimensional electron gas distribution becomes non-uniform
Solution Approach 1:
The patent applies local quality by reducing the electron-supplying layer thickness only in the gate region (creating a recessed structure) while maintaining the original thickness in the source and drain regions. This localized thinning allows electron depletion underneath the gate for enhancement type operation, while preserving uniform electron gas distribution in the contact regions where low resistance is critical.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed design achieves reduced ON-resistance by ensuring uniform electron gas distribution and accurate threshold bias control, resulting in improved power efficiency and reliability of the field effect transistor.
Implementation Method 1
precise control over the threshold bias through a combination of dry and wet etching processes
Implementation Method 2
Electron accumulated in the hetero junction interface between the intermediate layer 9 composed of AlN and the channel layer 3 composed of GaN constitutes a two-dimensional electron gas 6
Data Source
AI summary
A field effect transistor includes: a channel layer 103 containing GaN or InGaN; a first electron-supplying layer 104 disposed over the channel layer 103 and containing InxAlyGa1-x-yN (0≦x<1, 0<y<1, 0<x+y<1); a first etch stop layer 105 disposed over the first electron-supplying layer 104 and containing indium aluminum nitride (InAlN); and a second electron-supplying layer 106 provided over the first etch stop layer 105 and containing InaAlbGa1-a-bN (0≦a<1, 0<b<1, 0<a+b<1). A first recess 111, which extends through the second electron-supplying layer 106 and the first etch stop layer 105 and having a bottom surface constituted of a section of the first electron-supplying layer 104, is provided in the second electron-supplying layer 106 and the first etch stop layer 105. A gate electrode 109 covers the bottom surface of the first recess 111 and is disposed in the first recess 111. The second electron-supplying layer is provided so as to overlap with regions of an interface between the first electron-supplying layer 104 and the channel layer 106 except a region thereof under the bottom surface of the first recess 111 covering the gate electrode 109.