GaN HEMT Normally-Off Structure via Carbon Doping
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Solution Overview
Problem
In high electron mobility transistors (HEMTs) using GaN and AlGaN layers, achieving a normally-off state is challenging due to high on resistance and leak current issues, primarily caused by difficulties in etching and forming p-GaN layers, which lead to damage and variations in the electron supply layer, affecting device yield and performance.
Innovation Solution
A semiconductor device structure is developed with a p-type layer formed below the gate electrode, where the doping layer has a specific impurity density range, and C is doped to cancel out the acceptor function of Mg, allowing for efficient formation of the p-type layer without increasing on resistance, and the doping layer is formed under specific MOVPE conditions to prevent electron supply layer damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a recess is formed by removing part of the electron supply layer to make the HEMT normally-off, then the HEMT can be made normally-off, but the etching damage near the electron transit layer increases on resistance and leak current
Solution Approach 1:
The patent divides the electron supply layer into two distinct regions: a first electron supply layer region that maintains 2DEG for normal conduction, and a second electron supply layer region under the gate electrode where 2DEG is removed to enable normally-off capability. This segmentation allows the device to achieve normally-off operation without compromising the conduction regions, thereby reducing on resistance and leak current while maintaining reliability.
2Ease of operation
If a p-GaN layer is formed between the gate electrode and electron supply layer to reduce 2DEG generation, then the HEMT becomes normally-off, but the etching process causes variations in electron supply layer thickness and deteriorates device properties
Solution Approach 1:
The patent performs preliminary patterning of the electron supply layer before gate electrode formation to define the first and second electron supply layer regions. By pre-establishing the region boundaries through selective removal of 2DEG-generating portions, the subsequent gate electrode fabrication process does not require aggressive etching that would cause thickness variations. This preliminary action ensures manufacturing precision while achieving normally-off capability.
3Ease of manufacture
If dry etching is used to remove p-GaN film from areas excluding the gate electrode area, then the p-GaN layer can be removed, but the etching process is difficult to control with high selection ratio between AlGaN and GaN, leading to incomplete removal or damage to the electron supply layer
Solution Approach 1:
The patent extracts the problematic p-GaN layer removal step by directly patterning the electron supply layer to create the second electron supply layer region without forming a p-GaN intermediate layer. This approach eliminates the need for difficult dry etching processes with high selection ratios, as the electron supply layer can be selectively removed using standard photolithography and wet etching techniques. The result is complete removal where needed without damaging the electron supply layer, thereby reducing on resistance and leak current.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach enables the creation of a normally-off HEMT with reduced on resistance and leak current, improving device performance and yield by ensuring the 2DEG disappears only under the gate electrode, maintaining the 2DEG elsewhere, and allowing for efficient doping without damaging the electron supply layer.
Implementation Method 1
a doping layer formed on the electron supply layer, the doping layer being formed with a nitride semiconductor in which an impurity element to become p-type and C are doped
Data Source
AI summary
A semiconductor device includes an electron transit layer formed on a substrate; an electron supply layer formed on the electron transit layer; a doping layer formed on the electron supply layer, the doping layer being formed with a nitride semiconductor in which an impurity element to become p-type and C are doped; a p-type layer formed on the doping layer, the p-type layer being formed with a nitride semiconductor in which the impurity element to become p-type is doped; a gate electrode formed on the p-type layer; and a source electrode and a drain electrode formed on the doping layer or the electron supply layer. The p-type layer is formed in an area immediately below the gate electrode, and a density of the C doped in the doping layer is greater than or equal to 1×1017 cm−3 and less than or equal to 1×1019 cm−3.