GaN HEMT Normally-Off Fabrication via Selective Mg Activation

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Solution Overview

Problem

High electron mobility transistors (HEMTs) with AlGaN/GaN heterostructures face challenges in achieving a normally-off status without increasing on-resistance, due to difficulties in activating magnesium-doped GaN layers, which affects the uniformity and yield of the devices.

Innovation Solution

A method involving the sequential formation of semiconductor layers with a p-type impurity element, where a dielectric layer is used to selectively activate magnesium in specific regions beneath the gate electrode, allowing for a normally-off status without increasing on-resistance by controlling the activation of magnesium to form p-GaN regions and high resistance regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If magnesium-doped GaN layer is formed to achieve normally-off status, then threshold voltage shifts to positive side, but activation uniformity deteriorates and yield decreases

Engineering Contradiction:
Improvenormally-off statusVSAvoidactivation uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent divides the magnesium-doped GaN layer into multiple sub-layers with different thicknesses and doping concentrations. The layer directly beneath the gate electrode has optimized thickness (50-200 nm) for proper activation, while other regions have different characteristics. This segmentation allows selective activation in the gate region while maintaining control over overall uniformity and yield.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different magnesium doping concentrations and layer thicknesses in different regions. The region beneath the gate electrode has specific characteristics (50-200 nm thickness) to ensure proper activation and normally-off status, while other regions have different properties to maintain overall uniformity. This local optimization resolves the contradiction between achieving normally-off status and maintaining activation uniformity.

Inventive Principle:
Principle #3Local quality

2Reliability

If heat treatment is applied to activate magnesium in Mg-doped GaN layer, then p-type conductivity is achieved, but boundary between activated and inactivated regions fluctuates

Engineering Contradiction:
Improvep-type conductivityVSAvoidboundary uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent segments the magnesium-doped GaN layer into multiple sub-layers with different thicknesses and doping concentrations. This segmentation creates distinct regions with different activation characteristics, allowing the boundary between activated and inactivated regions to be more clearly defined and controlled during heat treatment, reducing fluctuation and improving boundary uniformity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary formation of the multi-layer magnesium-doped GaN structure with optimized thicknesses and doping concentrations before heat treatment. This preliminary structuring ensures that during subsequent heat treatment, the activation process proceeds more uniformly with less boundary fluctuation, as the pre-defined layer structure guides the diffusion and activation processes.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If thickness of Mg-doped GaN layer is increased to secure normally-off status, then threshold voltage shifts positively, but uniformity and yield are lowered

Engineering Contradiction:
Improvenormally-off statusVSAvoiddevice uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent divides the thick magnesium-doped GaN layer into multiple sub-layers with different thicknesses. The sub-layer directly beneath the gate electrode has optimized thickness (50-200 nm) for proper normally-off status, while other sub-layers have different thicknesses. This segmentation allows achieving the required threshold voltage shift without the uniformity and yield problems associated with uniformly thick layers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different layer thicknesses and doping concentrations in different regions to achieve locally optimized performance. The region beneath the gate electrode has specific thickness characteristics for normally-off status, while other regions have different properties. This local quality approach maintains device uniformity and yield while securing normally-off status.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables high uniformity and reliable normally-off status in HEMTs without increasing on-resistance, improving the yield and uniformity of the semiconductor devices.

Implementation Method 1

heat treatment is generally conducted on the Mg-doped GaN layer under a nitrogen atmosphere to eliminate hydrogen from the GaN layer, which may activate the Mg within the GaN layer to become a p-type

Methodology Applied
Scientific EffectThermal activation: Heat Treatment

Implementation Method 2

piezoelectric polarization may be induced by lattice strain due to the difference in the lattice constant between the AlGaN and GaN

Methodology Applied
Scientific EffectPiezoelectric polarization: Piezoelectric Effect

Implementation Method 3

The HEMT having a structure of FIG. 1 includes an (AlN) buffer layer 912, an i-AlGaN buffer layer 913, an electron transit layer 914, and an electron donation layer 915 formed on a substrate 911

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS8962409B2Semiconductor device and fabrication method
Publication Date: 2015.02.24 TRANSPHORM JAPAN
  • US8962409B2 patent drawing
  • US8962409B2 patent drawing
  • US8962409B2 patent drawing

AI summary

A method for fabricating a semiconductor device is disclosed. The method includes sequentially forming a first semiconductor layer, a second semiconductor layer and a semiconductor cap layer containing a p-type impurity element on a substrate, forming a dielectric layer having an opening after the forming of the semiconductor cap layer, forming a third semiconductor layer containing a p-type impurity element on the semiconductor cap layer exposed from the opening of the dielectric layer, and forming a gate electrode on the third semiconductor layer.