GaN HEMT Recess Structure Suppresses Current Collapse

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Solution Overview

Problem

High electron mobility transistors (HEMTs) using compound semiconductor devices, such as GaN, face issues with current collapse due to electric field concentration near the drain side edge of the gate electrode, which is exacerbated by the presence of a field plate, leading to increased on-resistance and reduced gain.

Innovation Solution

The formation of a recess between the gate electrode and the drain electrode in the compound semiconductor device structure, which reduces electric field concentration and avoids the need for a field plate, thereby suppressing current collapse and minimizing parasitic capacitance, allowing for higher gain without the field plate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a field plate is connected to a source electrode to reduce current collapse, then on-resistance increases are suppressed, but device gain is lowered

Engineering Contradiction:
Improvecurrent collapse suppressionVSAvoiddevice gain
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The invention divides the gate electrode structure into two parts: a conventional gate electrode and an additional gate electrode extending toward the drain electrode. This segmentation allows the additional gate to control the electric field distribution and suppress current collapse without requiring a field plate, thereby maintaining device gain while improving reliability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An insulating film is introduced as an intermediary between the additional gate electrode and the underlying semiconductor structure. This insulating film enables the additional gate to control the electric field distribution without direct contact, suppressing current collapse while avoiding the gain reduction associated with field plate structures

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a field plate is used to control electric field concentration, then current collapse is suppressed, but parasitic capacitance increases

Engineering Contradiction:
Improveelectric field controlVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of using a field plate connected to the source electrode (conventional approach), the invention uses an additional gate electrode extending from the gate toward the drain, controlled at gate potential. This inverted approach controls electric field concentration more effectively while minimizing parasitic capacitance between the additional gate and drain electrode

Inventive Principle:
Principle #13The other way round (Inversion)

3Reliability

If electric field concentration is controlled using conventional structures, then current collapse is reduced, but on-resistance increases

Engineering Contradiction:
Improvecurrent collapse reductionVSAvoidon-resistance
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The invention changes the geometric parameters of the gate structure by adding an electrode that extends toward the drain, and adjusts the insulating film thickness to optimize electric field distribution. These parameter changes enable current collapse suppression while maintaining low on-resistance by preventing excessive electric field concentration at the drain-side gate edge

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9722037B2Compound semiconductor device and manufacturing method of the same
Publication Date: 2017.08.01 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9722037B2 patent drawing
  • US9722037B2 patent drawing
  • US9722037B2 patent drawing

AI summary

An embodiment of a compound semiconductor device includes: a substrate; a nitride compound semiconductor stacked structure formed on or above the substrate; and a gate electrode, a source electrode and a drain electrode formed on or above the compound semiconductor stacked structure. A recess positioning between the gate electrode and the drain electrode in a plan view is formed at a surface of the compound semiconductor stacked structure.