GaN Enhancement Mode Switch With P-Type Groove Gate
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Solution Overview
Problem
Current methods for achieving an enhancement mode gallium nitride switching device are limited by high gate leakage current and instability, particularly in Schottky gate technology, due to the formation of surface traps and ineffective quantum confinement, which restricts the device's threshold voltage and reliability.
Innovation Solution
A method involving the formation of a dielectric layer on a nitride transistor structure, with a groove structure created in the gate region and p-type semiconductor material arranged within, to pinch off the n-type conductive layer, thereby achieving a stable and reliable enhancement mode switching device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a thin barrier layer (less than 5 nm) is used to reduce electron density in the channel, then the device can achieve enhancement mode operation, but no effective quantum confinement is generated at positive gate voltage and surface traps are formed causing the channel not to be completely opened
Solution Approach 1:
The patent introduces a graded aluminum composition in the barrier layer, where the aluminum content varies through the thickness of the barrier layer. This creates local variations in the barrier properties, allowing effective quantum confinement at the aluminum-rich interface while maintaining a thinner overall barrier structure that enables enhancement mode operation.
Solution Approach 2:
The patent uses a composite barrier layer structure with varying aluminum composition (AlGaN with graded Al content) rather than a uniform composition. This composite structure provides both the thin barrier needed for enhancement mode and the effective quantum confinement through the compositional gradient at the AlGaN/GaN interface.
2Reliability
If the barrier layer thickness is reduced to less than 5 nm to pinch off the channel at zero gate voltage, then enhancement mode operation is achieved, but gate leakage current is increased due to electrons in surface traps
Solution Approach 1:
The graded aluminum composition creates a localized high-barrier region at the AlGaN/GaN interface through aluminum enrichment, which effectively suppresses electron leakage into surface traps while maintaining the thin overall barrier thickness for enhancement mode operation.
Solution Approach 2:
The patent changes the compositional parameter (aluminum concentration) through the barrier layer thickness, creating a gradient that optimizes both the confinement potential and the suppression of leakage currents by reducing the density of surface trap states.
3Adaptability or versatility
If Schottky gate technology is used to achieve enhancement mode operation, then the device can function as a power switching device, but the threshold voltage is generally about 0V-1V which does not reach the desired 3V-5V and gate leakage current is much larger than metal insulator semiconductor field-effect transistor
Solution Approach 1:
The patent changes the physical and chemical parameters of the gate structure, including the barrier layer composition gradient, thickness, and material properties, to shift the threshold voltage from the typical 0V-1V range to the desired 3V-5V range while maintaining low gate leakage current through improved interface quality.
Solution Approach 2:
The use of a composite AlGaN barrier layer with graded composition provides enhanced control over the potential profile and carrier confinement, enabling higher threshold voltage operation with reduced leakage compared to conventional uniform composition barriers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a gallium nitride enhancement mode switching device with improved conductivity and reliability, achieving the desired threshold voltage and reducing gate leakage current, making it suitable for high-frequency and high-power applications.
Implementation Method 1
an appropriate method is required to reduce channel carrier concentration under the gate region at zero gate bias
Implementation Method 2
forming a dielectric layer on a nitride transistor structure, with a groove structure created in the gate region
Data Source
Figure 1a~1c
Figure 1d~2a
Figure 2b~2d
AI summary
An enhanced switch device and a manufacturing method therefor. The method comprises: providing a substrate, and forming a nitride transistor structure on the substrate; fabricating and forming a dielectric layer on the nitride transistor structure, on which a gate region is defined; forming a groove structure on the gate region; depositing a p-type semiconductor material in the groove; removing the p-type semiconductor material outside the gate region on the dielectric layer; etching the dielectric layer in another position than the gate region on the dielectric layer to form two ohmic contact regions; and forming a source electrode and a drain electrode on the two ohmic contact regions, respectively. Therefore, the aims of pinching off an n-type conductive layer below a gate and controlling a threshold voltage are achieved, so as to realize an enhanced switch device.