Strain-Relieving Interlayers for GaN Semiconductor Devices

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Solution Overview

Problem

Group III-V semiconductor devices face strain issues due to lattice structure and thermal coefficient differences between silicon substrates and buffer layers, leading to potential cracking and wafer warping, which limits the thickness and breakdown voltage of semiconductor bodies for high voltage applications.

Innovation Solution

Incorporating strain-relieving interlayers composed of different group III-V semiconductor materials, such as GaN and AlN, between transition layers and semiconductor bodies to reduce strain, allowing for increased thickness and higher breakdown voltage without epitaxial layer cracking or wafer warping.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the first semiconductor body is made thicker to achieve higher breakdown voltage for high voltage applications, then the breakdown voltage is improved, but strain-induced cracking and wafer warping occur due to lattice mismatch and thermal expansion differences

Engineering Contradiction:
Improvebreakdown voltageVSAvoidstrain resistance
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent introduces a buffer layer composed of multiple sub-layers (AlN, GaN, AlGaN) between the silicon substrate and the GaN semiconductor body. These intermediary layers serve as stress-absorbing mediators that gradually transition the lattice mismatch between silicon and GaN, preventing strain accumulation that would otherwise cause cracking when the semiconductor body is made thick for high voltage operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The buffer layer is segmented into multiple functional sub-layers with different compositions and thicknesses. The AlN sub-layer provides strong lattice matching to silicon, the GaN sub-layer provides strong lattice matching to the GaN semiconductor body, and intermediate AlGaN layers provide gradual transition. This segmentation allows each layer to manage specific strain components, enabling the overall structure to support thicker semiconductor bodies.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the first semiconductor body is made thicker to achieve higher breakdown voltage, then the breakdown voltage is improved, but wafer warping occurs during device fabrication

Engineering Contradiction:
Improvebreakdown voltageVSAvoidwafer flatness
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The multi-layer buffer structure acts as an intermediary system that distributes and absorbs thermal stress during fabrication processes. Each buffer layer has different thermal expansion characteristics, creating a gradient that gradually accommodates the thermal mismatch between silicon substrate and GaN semiconductor body, thereby preventing sudden warping that would occur with a direct thick GaN layer on silicon.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Strength

If conventional transition layers with AlGaN are used to reduce strain, then some strain reduction is achieved, but additional strain relief is still necessary to allow sufficient thickness increase for high voltage applications

Engineering Contradiction:
Improvestrain resistanceVSAvoidbreakdown voltage
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

Different regions of the buffer layer have different local compositions optimized for their specific functions: AlN-rich regions near the silicon substrate for strong lattice matching, GaN-rich regions near the semiconductor body for strong interface matching, and graded AlGaN regions in between. This local quality variation allows the buffer layer as a whole to manage strain more effectively than uniform AlGaN transition layers, enabling thicker semiconductor bodies for high voltage operation.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9741841B2Group III-V semiconductor device with strain-relieving layers
Publication Date: 2017.08.22 INFINEON TECHNOLOGIES AMERICAS CORP
  • US9741841B2 patent drawing
  • US9741841B2 patent drawing
  • US9741841B2 patent drawing

AI summary

According to one exemplary embodiment, a group III-V semiconductor device includes at least one transition layer situated over a substrate. The group III-V semiconductor device further includes a first strain-relieving interlayer situated over the at least one transition layer and a second strain-relieving interlayer situated over the first strain-relieving interlayer. The group III-V semiconductor device further includes a first group III-V semiconductor body situated over the second strain-relieving interlayer. The first and second strain-relieving interlayers comprise different semiconductor materials so as to reduce a strain in the first group III-V semiconductor body. The second strain-relieving interlayer can be substantially thinner than the first strain-relieving interlayer.