GaN Transistor Threshold Voltage Tuning via Work Function
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Solution Overview
Problem
Existing approaches to setting threshold voltages for multiple transistors on the same wafer to different magnitudes are inadequate due to the difficulty in precisely controlling the etching of the polarization layer, leading to non-uniform results across the wafer, especially in GaN transistors where the 2DEG formation complicates the process.
Innovation Solution
The solution involves a work function-based approach where the polarization layer is grown in the gate-to-source and gate-to-drain regions instead of underneath the gate, allowing the work function of the gate conductor to modulate the threshold voltage, eliminating the impact of the polarization layer's presence and thickness on the transistor operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the polarization layer is etched to eliminate 2DEG under the transistor channel to tune threshold voltages, then the threshold voltage can be adjusted, but the etching process becomes difficult to control and produces non-uniform results across the wafer
Solution Approach 1:
The patent applies preliminary action by strategically positioning the polarization layer formation step before threshold voltage tuning is needed. The polarization layer is grown in the gate-to-source and gate-to-drain regions during the epitaxial growth process, establishing the desired 2DEG distribution before transistor fabrication begins. This preliminary positioning eliminates the need for subsequent etching operations to achieve threshold voltage tuning.
Solution Approach 2:
The patent applies local quality by creating spatially differentiated polarization layer distribution. The polarization layer is present in the gate-to-source and gate-to-drain regions to provide local 2DEG formation, while being absent from the channel region under the gate. This local differentiation allows threshold voltage tuning through work function modification without requiring etching, as each region serves its specific function.
2Adaptability or versatility
If the same etching methodology is used to etch the polarization layer at different places on the wafer, then the process is simplified, but distinctly different results are obtained due to polarization layer thickness and etch rate non-uniformity
Solution Approach 1:
The patent applies parameter changes by modifying the work function parameter of the gate conductor to achieve threshold voltage tuning. Instead of changing the physical presence or thickness of the polarization layer through etching, the invention changes the electrical parameter (work function) of the gate material. This allows adaptation to different threshold voltage requirements while maintaining uniform polarization layer thickness across the wafer, eliminating etching uniformity issues.
3Reliability
If the polarization layer is grown underneath the gate to form 2DEG, then the transistor channel conductivity is enhanced, but the threshold voltage becomes sensitive to polarization layer thickness variations
Solution Approach 1:
The patent applies segmentation by dividing the polarization layer distribution into distinct spatial segments. The polarization layer is segmented to be present in the gate-to-source and gate-to-drain regions for conductivity enhancement, while being absent from the channel region under the gate for threshold voltage stability. This segmentation allows the transistor to benefit from 2DEG formation in the source and drain regions while maintaining insensitivity to polarization layer thickness variations in the channel region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables accurate and reliable tuning of threshold voltages for both enhancement and depletion mode transistors, improving the yield of properly functioning transistors and facilitating their use in RF products, while avoiding the challenges of etching non-uniformity and process control issues.
Implementation Method 1
allowing the work function of the gate conductor to modulate the threshold voltage
Implementation Method 2
the formation of 2DEG in the transistor channel by an epitaxial polarization layer which is grown on the GaN
Data Source
AI summary
A semiconductor device is disclosed. The semiconductor device includes a substrate, an epitaxial layer on the substrate, a semiconductor interlayer on top of the epitaxial layer, a gate conductor above the semiconductor interlayer, a gate insulator on the bottom and sides of the gate conductor and contacting the top surface of the semiconductor interlayer, a source region extending into the epitaxial layer, and a drain region extending into the epitaxial layer. The semiconductor device also includes a first polarization layer on the semiconductor interlayer between the source region and the gate conductor and a second polarization layer on the semiconductor interlayer between the drain region and the gate conductor.