GaAs Diode Defect Layer Leakage Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-voltage-resistant semiconductor diodes face challenges with high leakage currents in the blocking region, especially at voltages above 1000V, which increase sharply with temperature, and are not cost-effective or robust in manufacturing.
Innovation Solution
A III-V semiconductor diode with a defect layer of specific thickness and defect concentration within the n-layer, produced using liquid phase epitaxy or MOVPE, reduces leakage currents by an order of magnitude and allows for lower switch-on resistances and capacitances, enabling broader voltage and frequency ranges with improved temperature resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If conventional high-voltage-resistant semiconductor diodes are used, then high dielectric strength is achieved, but leakage currents increase sharply with temperature and voltage above 1000V
Solution Approach 1:
The patent applies local quality by creating a defect layer with specific properties (defect concentration between 1×10^14 and 5×10^17 atoms/cm³, thickness between 0.5 μm and 30 μm) within the n-layer at a specific position (5 μm to 25 μm from the p+-n junction). This localized modification reduces leakage currents in the blocking region while maintaining high dielectric strength, as the defect layer provides recombination centers that suppress carrier multiplication without compromising the overall structural integrity.
Solution Approach 2:
The patent changes physical parameters by introducing a defect layer with controlled defect concentration and thickness within the n-layer. This parameter modification creates recombination centers that reduce leakage currents by more than an order of magnitude at voltages above 1000V and temperatures up to 300°C, while maintaining the high dielectric strength required for high-voltage operation.
2Object-generated harmful factors
If high-voltage-resistant semiconductor diodes are designed for low leakage currents, then blocking performance improves, but turn-on resistances and switch-on capacities increase
Solution Approach 1:
The defect layer is localized within the n-layer away from the space charge zone (5 μm to 25 μm from the junction), creating local recombination centers that reduce leakage currents without significantly affecting the turn-on characteristics. The low defect concentration (1×10^14 to 5×10^17 atoms/cm³) ensures minimal impact on forward conduction, maintaining low turn-on resistances while achieving low leakage currents in the blocking region.
3Ease of manufacture
If conventional manufacturing processes are used, then production is established, but manufacturing robustness and cost-effectiveness are insufficient
Solution Approach 1:
The defect layer is formed during the liquid phase epitaxy growth process itself, utilizing the natural incorporation of impurities or deliberate addition of defect-generating species (such as Cr, In, or Al) during crystal growth. This self-service approach integrates defect layer formation into the existing manufacturing process without requiring separate implantation or fabrication steps, thereby improving manufacturing robustness and cost-effectiveness while achieving the desired electrical characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The diode achieves significantly reduced leakage currents, lower switch-on resistances, and capacitances, enabling operation from 200V to 3300V with switching frequencies from 30 kHz to 0.5 GHz and current densities up to 5 A/mm², while being more cost-effective and robust, with high temperature resistance up to 300°C.
Implementation Method 1
a recombination of charge carriers is achieved within the defect layer
Implementation Method 2
the layers are produced using a liquid phase epitaxy or using a MOVPE system
Implementation Method 3
the layers are produced using a liquid phase epitaxy or using a MOVPE system
Data Source
Figure 1~3
Figure 4~9
AI summary
Stacked III-V semiconductor diode (10) comprising an n+ layer (12) with a dopant concentration of at least 1019 N/cm3, an n- layer (14) with a dopant concentration of 1012-1016 N/cm3, a layer thickness (D2) of 10-300 µm, a p+ layer (18) with a dopant concentration of 5•1018-5•1020 cm3, with a layer thickness (D3) greater than 2 µm, wherein the layers follow one another in the aforementioned order, each comprising or consisting of a GaAs compound and being monolithic, the n+ layer (12) or the p+ layer (18) being formed as a substrate and a bottom surface of the n' layer (14) being metallurgically bonded to a top surface of the n+ layer (12), the stacked III-V semiconductor diode (10) comprises a first defect layer (16) with a layer thickness (D4) greater than 0.5 µm,the defect layer (16) is located within the n' layer and the defect layer (16) has a defect concentration in a range between 1•1013N/cm3 and 5•1016N/cm3.