Stacked GaAs Diode Edge Leakage Reduction
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Solution Overview
Problem
Existing high-blocking III-V power semiconductor diodes face challenges in minimizing reverse currents and increasing breakdown voltage due to residual or leakage currents, particularly at the edges of planar p-n junctions or mesa structures.
Innovation Solution
A stacked high-blocking III-V power semiconductor diode design featuring a p+ substrate layer with a GaAs compound, along with p− and n− layers, and metallic contact layers, where the n− region is grown over a seed opening to cover the edge region, reducing series resistance and leakage currents through epitaxial growth and a hard mask layer to suppress current paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If planar p-n junctions or mesa structures are used in III-V power semiconductor diodes, then the device structure is simple and manufacturing is easier, but residual or leakage currents occur at the edges which increase reverse currents and reduce breakdown voltage
Solution Approach 1:
The device structure is segmented into distinct functional regions: a first region with a first conductivity type (n-type drift region), a second region with a second conductivity type (p-type contact region), and a third region with the first conductivity type (n-type contact region). This segmentation allows each region to be optimized for its specific function, preventing edge leakage while maintaining manufacturing feasibility through standardized layer stacking processes.
Solution Approach 2:
Different regions of the semiconductor structure are assigned different local properties: the n-type drift region has high breakdown voltage characteristics, the p-type contact region has low resistance properties, and the n-type contact region provides electrical connection. This local differentiation of material properties and doping concentrations optimizes each zone's performance to collectively achieve high breakdown voltage while eliminating edge leakage currents.
2Reliability
If the n− layer thickness is increased to reduce leakage currents, then the breakdown voltage increases, but the series resistance increases and electrical properties deteriorate
Solution Approach 1:
The n-type drift region is optimized with specific thickness and doping concentration parameters to achieve the required breakdown voltage while minimizing resistance. The adjacent n-type contact region is heavily doped to provide low-resistance electrical connection, compensating for any resistance introduced by the drift region thickness. This local differentiation allows simultaneous optimization of both breakdown voltage and series resistance.
Solution Approach 2:
The semiconductor structure combines multiple doped regions with different electrical properties: a moderately doped n-type drift region for high breakdown voltage, and a heavily doped n-type contact region for low series resistance. This composite structure of regions with different doping levels allows the device to achieve both high voltage blocking capability and low forward conduction resistance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves a significant reduction in leakage currents and enhances breakdown voltage, improving the electrical properties and thermal coupling of the semiconductor diode by minimizing series resistance and ensuring reliable heat dissipation.
Implementation Method 1
The n− region is grown over a seed opening to cover the edge region, reducing series resistance and leakage currents through epitaxial growth
Data Source
AI summary
A stacked high-blocking III-V power semiconductor diode, with a p+ or n+ substrate layer, a p− layer, an n− region with a layer thickness of 10 μm-150 μm, and an n+ or p+ layer, wherein all layers comprise a GaAs compound, a first metallic contact layer and a second metallic contact layer and a hard mask layer with at least one seed opening, wherein the hard mask layer is integrally bonded to the substrate layer or integrally bonded to the p− layer, the n− region extends within the seed opening and over an edge region, adjacent to the seed opening, of a top side of the hard mask layer and the n− region within the seed opening is integrally bonded to the p− layer or to the n+ substrate layer and in the edge region of the top side of the hard mask layer to the hard mask layer.