GaAs pHEMT Level-Shift Switch Driver for Low-Loss RF Isolation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing radio frequency (RF) semiconductor switches face a tradeoff between low insertion loss and high off-state isolation due to the scaling of device width, which affects the noise figure and efficiency of RF modules, particularly in GaAs monolithic microwave integrated circuits (MMICs).
Innovation Solution
A level shift circuit integrated into the MMIC generates biasing voltage signals that swing between one diode drop above ground and a negative voltage to minimize the on-state resistance of GaAs pHEMT switches, reducing insertion loss without increasing capacitance, by forward biasing the gate electrodes to the edge of conduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If device width is scaled up to achieve lower on state resistance, then insertion loss is reduced, but capacitance increases which degrades off state isolation
Solution Approach 1:
The patent applies parameter changes by implementing a level shifting circuit that dynamically adjusts the gate voltage parameter. The circuit transforms a standard logic level signal (0V to -5V) into an enhanced signal that applies approximately -6V to the pHEMT gate during the OFF state. This voltage parameter change increases the reverse bias on the gate, thereby reducing parasitic capacitance and improving off-state isolation without requiring increased device width that would degrade isolation.
2Loss of energy
If gate source voltage is increased above zero volts to reduce resistance, then on resistance decreases, but the voltage is limited by Schottky Diode gate forward biasing
Solution Approach 1:
The patent introduces an intermediary level shifting circuit between the control logic and the pHEMT gate. This intermediary circuit performs voltage transformation, taking the standard logic signal and converting it to a signal that can apply approximately -6V to the gate. The level shifter acts as a mediator that resolves the conflict between wanting to apply higher negative voltages for better OFF state performance and being constrained by the Schottky diode forward bias characteristic, enabling extended voltage swing without direct connection to the gate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach achieves a 0.2 dB improvement in insertion loss and allows for wider bandwidth by minimizing the on-state resistance and capacitance, while maintaining high off-state isolation, and can be automatically adapted to temperature changes.
Implementation Method 1
A level shift circuit included in the same MMIC generates a biasing voltage signal at an output source and electrically communicates with the gate electrodes of the switching units for biasing the gate electrodes of the switching units. The level shift circuit is responsive to an externally provided control signal, and provides an output that swings between approximately one diode drop above ground and a negative voltage to bias the switching circuit elements for reduced loss.
Data Source
AI summary
A radio frequency semiconductor switching device (S) is formed on an MMIC structure (C) including a switching circuit element (12) having four semiconductor switching units (68, 70) with each adapted for receiving a gate control signal. A level shift circuit (10) generates a biasing voltage signal communicated of the switching units (68, 70) for biasing the switching units (68), and provides an output that swings between approximately one diode drop above ground and a negative voltage to bias the switching circuit elements (68 and 70) for reduced loss. The level shift circuit (10) is responsive to an externally provided control signal (58). The switching units (68, 70) are formed into a grouping of at least, a first and a second set (76, 78) of interconnected semiconductor switching units (68, 70) with each set (76, 78) having gates of at least two of the interconnected switching units (68, 70) connected with the level shift circuit output (60, 62). Both the switching units (68, 70) and the level shift circuit (10) are formed on the MMIC structure (C).