GaAs Wafer Bonding for Thick Layer Growth

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Solution Overview

Problem

Existing methods for manufacturing GaAs layer stacks, such as those for high-voltage-resistant semiconductor diodes and tandem solar cells, face challenges in achieving high crystal quality and reducing dislocations, particularly for thick semiconductor layers, while also being inefficient in the use of substrates and requiring lengthy deposition processes.

Innovation Solution

A manufacturing method involving wafer bonding of sub-stacks with specific dopant concentrations and thicknesses, including a p+ substrate, a p- layer produced by epitaxy or implantation, and an n- layer that can be thinned or produced epitaxially, allowing for the formation of thick n-layers without lengthy deposition and reducing dislocations, with the option to introduce recombination centers in the p-interlayer and reuse substrates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If thick semiconductor layers are produced by conventional deposition methods, then the desired layer thickness is achieved, but the process becomes lengthy and dislocation density increases

Engineering Contradiction:
Improvelayer thicknessVSAvoiddeposition time
Core Design Contradiction:
Length of stationary objectVSLoss of time

Solution Approach 1:

The manufacturing process is divided into two separate stages: first producing thick layers on sacrificial substrates, then transferring these pre-grown layers to the final substrate. This segmentation allows the deposition time to be decoupled from the final device structure, enabling thick layers to be formed without proportionally increasing the overall process time for the final device.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Thick semiconductor layers are grown in advance on sacrificial substrates before being transferred to the final substrate. This preliminary action allows the time-consuming deposition process to occur separately, enabling the final device assembly to proceed more quickly while still achieving the required layer thickness.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If conventional wafer bonding is used to join substrates, then substrate bonding is achieved, but crystal quality deteriorates and dislocations are introduced

Engineering Contradiction:
Improvebonding strengthVSAvoidcrystal quality
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A sacrificial substrate acts as an intermediary carrier that enables the growth of thick semiconductor layers without direct bonding to the final substrate. This intermediary approach allows layer formation and substrate removal to occur separately, avoiding the crystal damage that would result from direct high-stress bonding of thick layers to the final substrate.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The sacrificial substrate is selectively removed after serving its purpose of supporting thick layer growth. This extraction eliminates the source of crystal stress and dislocations, leaving only the high-quality semiconductor layers bonded to the final substrate without the defects that would arise from conventional thick-layer bonding.

Inventive Principle:
Principle #2Taking out (Extraction)

3Quantity of substance

If substrates are used for thick layer production, then sufficient material is available, but substrate waste increases

Engineering Contradiction:
Improvesemiconductor materialVSAvoidsubstrate waste
Core Design Contradiction:
Quantity of substanceVSLoss of substance

Solution Approach 1:

Sacrificial substrates serve as temporary carriers that can be selectively removed after transferring the semiconductor layers. This allows the same substrate material to be reused for multiple layer growth cycles, significantly reducing substrate waste while maintaining sufficient material availability for producing thick semiconductor layers.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The sacrificial substrate is discarded after its function of supporting layer growth is complete, while the valuable semiconductor layers are recovered and transferred to the final substrate. This approach maximizes the utilization of semiconductor material while minimizing waste of the sacrificial substrate through systematic reuse in subsequent growth cycles.

Inventive Principle:
Principle #34Discarding and recovering

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances the crystal quality of the layer stack, increases charge carrier lifetime, and allows for the reuse of substrates, resulting in fewer dislocations and improved performance, particularly for n- layers, while simplifying the deposition process and reducing substrate waste.

Implementation Method 1

The p- layer is produced by epitaxy on a top side of the p + substrate or by ion implantation into the p + substrate

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Implementation Method 2

a top side of the first sub-stack is bonded to a top side of the second sub-stack by wafer bonding in order to produce the layer stack

Methodology Applied
Scientific EffectWafer bonding: Welding

Data Source

PatentEP3336906B1Method of manufacturing a stack from a p+substrate, a p-type layer, an n-type layer and a third layer
Publication Date: 2019.04.10 3 5 POWER ELECTRONICS GMBH
  • EP3336906B1 patent drawingFigure 1~3A
  • EP3336906B1 patent drawingFigure 3B~4

AI summary

A method for manufacturing a layer stack consisting of a p+ substrate, a p layer, an n- layer, and a third layer, wherein the p+ substrate has a dopant concentration of 5*1018-5*1020 cm-3 and a layer thickness of 50-900 µm and comprises or consists of a GaAs compound, and the p- layer has a dopant concentration of 1014-1016 cm-3 and a layer thickness of 0.01-30 µm and comprises or consists of a GaAs compound, and the n- layer has a dopant concentration of 1014-1016 cm-3, a layer thickness of 10-200 µm, and comprises or consists of a GaAs compound, and a first sub-stack and a second sub-stack are produced, and a top surface of the first sub-stack is connected to a top surface of the second sub-stack by Wafer bonds are materially connected to create the layer stack, and the first substack includes at least the p+ substrate,and the second substack comprises at least the n--layer, and the p--layer is generated by epitaxy or implantation on a top side of the p+-substrate or by epitaxy on the n--layer, and the p--layer forms the top side of the first substack or the second substack, and the third layer is generated before or after wafer bonding, and the n--layer is generated either after wafer bonding by grinding away an n--substrate that at least partially forms the second substack, or the n--layer is generated before wafer bonding on an n+-substrate.