Programmable Gain Timer Circuit for Accurate Reset Timeout
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Solution Overview
Problem
Existing oscillator circuits and supervisory circuits that rely on external tunable capacitors for reset timeout periods face accuracy issues due to poor absolute value and temperature/voltage coefficients, leading to degraded timing accuracy.
Innovation Solution
A resistor-controlled timer circuit with programmable gain circuitry and comparator circuits that dynamically adjust the comparator threshold to achieve a tunable reset timeout period, using a tunable resistor to improve timing accuracy by reducing dependence on external components and enhancing stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If external tunable capacitors are used to provide variable reset timeout intervals, then flexibility and external tunability are improved, but timing accuracy and stability deteriorate due to poor absolute value and temperature/voltage coefficients
Solution Approach 1:
The patent removes the external capacitor from the timing circuit and extracts only the necessary tuning function. The timing function is moved entirely onto the chip using internal resistors and capacitors, while external tuning is achieved through digital control of current sources that charge/discharge the internal capacitor at controlled rates, thereby eliminating the accuracy problems of external capacitors while preserving external tunability.
Solution Approach 2:
The patent replaces the mechanical/electrical system of external capacitor tuning with a digital control system. Digital control signals regulate current sources that charge and discharge an internal capacitor, substituting the direct electrical connection of external capacitors with a digitally-controlled current regulation mechanism, thereby improving timing accuracy while maintaining programmability.
2Duration of action of moving object
If external tunable capacitors are used for reset timeout periods, then variable timing intervals are achieved, but temperature drift and voltage coefficient effects increase
Solution Approach 1:
The patent introduces an internal capacitor as an intermediary element between the external tuning mechanism and the timing function. This internal capacitor is charged and discharged by current sources that are externally controllable, allowing the timing interval to be adjusted without using an external capacitor directly in the timing circuit, thereby isolating the timing function from temperature and voltage variations.
Solution Approach 2:
The patent changes the control parameter from direct capacitor value selection to current charging rate control. By controlling the current sources that charge and discharge the internal capacitor, the timing interval is adjusted through parameter changes in the current magnitude rather than through external capacitor selection, which improves temperature and voltage stability.
3Measurement precision
If fixed on-chip timer circuits are used, then timing accuracy is improved, but adaptability and flexibility deteriorate
Solution Approach 1:
The patent makes the previously static on-chip timer dynamic and programmable. Digital control signals can adjust the charging and discharging rates of the internal capacitor by controlling current sources, allowing the timing interval to be dynamically changed to suit different applications while maintaining the accuracy benefits of on-chip implementation.
Solution Approach 2:
The patent creates a universal timer circuit that can serve multiple applications with different timing requirements. The same on-chip circuit can be programmed through digital control to provide different timeout intervals, making it adaptable to various supervisory and timing applications while maintaining high timing accuracy through integrated implementation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly improves timing accuracy and reduces temperature drift, allowing for precise control of reset timeout periods with improved reliability and flexibility across varying applications.
Implementation Method 1
A comparator circuit is configured to transition between providing a signal having a first value and providing a signal having a second value based at least in part upon comparisons of a capacitor voltage level with the amplified resistor voltage level and with a second reference voltage
Implementation Method 2
A programmable gain circuit is coupled to amplify the resistor voltage level based upon a selected gain
Implementation Method 3
A reactive circuit element excitation circuit is configured to reverse excitation of the capacitor in response to the comparator circuit transitioning between providing the signal having the first value and providing the signal having the second value
Data Source
AI summary
A timer circuit is provided comprising: a resistor; a programmable gain circuit coupled to amplify the reference level based upon a resistor and a selected gain; a detection circuit coupled to identify the amplified reference level based upon a resistor; a selection circuit configured to select the gain based at least in part upon the identified amplified reference level based upon a resistor; a comparator circuit configured to transition between providing a signal having a first value and providing a signal having a second value based at least in part upon comparisons of a reactive circuit element excitation level with the amplified reference level based upon a resistor and with a second reference level; and reactive circuit element excitation circuit configured to reverse excitation of the reactive circuit element in response to the comparator circuit transitioning between providing the signal having the first value and providing the signal having the second value.