Globally Asynchronous Locally Synchronous Neuromorphic Network Power Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing neuromorphic and synaptronic computation systems face challenges in efficiently managing power consumption and synchronization in neural networks, as they often require traditional digital models and global clock signals, which can lead to increased active power consumption and complexity.
Innovation Solution
A globally asynchronous and locally synchronous neuromorphic network is developed, utilizing synchronization signals to process spike events synchronously within neural core circuits, with asynchronous routers facilitating inter-core communication, thereby minimizing active power consumption and eliminating the need for a global clock signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional digital models with global clock signals are used, then synchronization is achieved, but active power consumption increases
Solution Approach 1:
The system divides the neural network into multiple independent core circuits, each capable of autonomous operation. Each core maintains local synchronization through its own event queue and processing cycle, eliminating the need for a single global clock signal while preserving synchronization within each core.
Solution Approach 2:
The system transitions from static global clock synchronization to dynamic event-driven synchronization. Cores advance through processing cycles based on actual event arrival times rather than fixed clock ticks, allowing asynchronous operation between cores while maintaining local order within each core.
2Reliability
If global clock signals are used for synchronization, then coordination is maintained, but device complexity increases
Solution Approach 1:
The global clock signal is extracted and removed from the system architecture. Instead of distributing a centralized clock throughout the network, each core generates its own timing signals based on incoming events, simplifying the overall system structure.
Solution Approach 2:
Each core circuit serves its own synchronization needs autonomously. The event queue mechanism allows each core to self-regulate its processing rhythm based on event arrival patterns, eliminating dependence on external clock distribution infrastructure.
3Use of energy by moving object
If asynchronous communication is used between cores, then power consumption is reduced, but routing complexity increases
Solution Approach 1:
Destination address information is prepared and embedded in event packets before transmission. Routers use this pre-packaged addressing data to make forwarding decisions without complex real-time routing computations, simplifying the routing fabric while supporting asynchronous operation.
4Productivity
If synchronous processing is used within cores, then processing efficiency is improved, but power consumption increases
Solution Approach 1:
Processing within each core occurs in periodic cycles triggered by event arrivals rather than continuous clock ticks. The core processes events in batches during active periods and remains in low-power states between events, maintaining processing efficiency while reducing overall power consumption.
Data Source
AI summary
Embodiments of the invention relate to a globally asynchronous and locally synchronous neuromorphic network. One embodiment comprises generating a synchronization signal that is distributed to a plurality of neural core circuits. In response to the synchronization signal, in at least one core circuit, incoming spike events maintained by said at least one core circuit are processed to generate an outgoing spike event. Spike events are asynchronously communicated between the core circuits via a routing fabric comprising multiple asynchronous routers.