Group III Nitride Semiconductor Device Manufacturing via P-Type Impurity Diffusion

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Solution Overview

Problem

Conventional methods for forming a p-type impurity containing region in n-type semiconductor layers, such as gallium nitride, often result in crystal defects that cannot be fully recovered by heat treatment, particularly in Group III nitride semiconductors, necessitating an alternative technique that does not involve ion implantation of p-type impurities into n-type semiconductor layers.

Innovation Solution

A method involving a stacking process of p-type and n-type semiconductor layers, followed by p-type ion implantation and heat treatment to diffuse p-type impurities into the n-type semiconductor layer, thereby forming a p-type impurity region without direct ion implantation into the n-type layer, which also includes optional n-type ion implantation and trench formation processes to manage potential crowding and electrical control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If ion implantation is performed to form a p-type impurity containing region in an n-type semiconductor layer, then the p-type region can be formed, but crystal defects are generated that cannot be recovered by heat treatment

Engineering Contradiction:
Improveformation of p-type impurity containing regionVSAvoidcrystal defect recovery
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by forming a p-type semiconductor layer on the n-type semiconductor layer before ion implantation. This p-type layer serves as a protective barrier that prevents direct ion implantation into the n-type layer, thereby avoiding crystal defects while still enabling the formation of a p-type impurity containing region through subsequent diffusion processes during heat treatment

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The p-type semiconductor layer acts as an intermediary between the ion implantation process and the n-type semiconductor layer. It mediates the formation of the p-type impurity containing region by allowing controlled diffusion of p-type impurities into the n-type layer during heat treatment without the direct mechanical damage caused by ion implantation

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If direct ion implantation of p-type impurity into n-type semiconductor layer is avoided, then crystal defects are prevented, but alternative methods are required to form p-type impurity containing region

Engineering Contradiction:
Improvecrystal structure integrityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the manufacturing process into distinct stages: first forming a p-type semiconductor layer through epitaxial growth, then performing ion implantation on this protective layer, and finally using heat treatment to diffuse p-type impurities into the n-type layer. This segmentation allows each process to be optimized independently while maintaining overall process efficiency

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes parameter changes during heat treatment to achieve the desired outcome. By controlling temperature, time, and atmospheric conditions during the heat treatment process, p-type impurities diffuse from the p-type semiconductor layer into the n-type semiconductor layer, forming the required p-type impurity containing region without direct ion implantation

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively forms a p-type semiconductor region in the n-type semiconductor layer without causing crystal irregularities, allowing for the activation of p-type impurities and improved semiconductor device performance by preventing direct ion implantation-induced defects and enhancing electrical properties.

Implementation Method 1

the p-type impurity of the p-type semiconductor layer is diffused into the n-type semiconductor layer to form a first p-type impurity containing region

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

In the heat treatment process, heat treatment is performed to activate the ion-implanted p-type impurity

Methodology Applied
Scientific EffectHeat treatment: Heat Treatment

Data Source

PatentUS10490408B2Method for manufacturing semiconductor device
Publication Date: 2019.11.26 TOYODA GOSEI CO LTD
  • US10490408B2 patent drawing
  • US10490408B2 patent drawing
  • US10490408B2 patent drawing

AI summary

A method for manufacturing a semiconductor device comprises: a stacking process that stacks a p-type semiconductor layer of Group III nitride containing a p-type impurity on a first n-type semiconductor layer of Group III nitride containing an n-type impurity; a p-type ion implantation process that ion-implants the p-type impurity into the p-type semiconductor layer; and a heat treatment process that performs heat treatment to activate the ion-implanted p-type impurity. The p-type ion implantation process and the heat treatment process are performed such that the p-type impurity of the p-type semiconductor layer is diffused into the n-type semiconductor layer to form a first p-type impurity containing region in at least part of the first n-type semiconductor layer and below a region of the p-type semiconductor layer into which the ion implantation has been performed.