Gallium Oxide Semiconductor Layer for Higher Breakdown Voltage
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Solution Overview
Problem
Existing semiconductor devices struggle to enhance breakdown voltage without incorporating a p-type semiconductor region or layer.
Innovation Solution
A semiconductor device is designed with a semiconductor layer comprising a first region of crystalline oxide semiconductor containing gallium and a second region of oxide containing gallium, where the second region has a lower carrier density and is located at a depth of 1.0 μm or more from the upper surface, and an electrode is formed on the semiconductor layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a p-type semiconductor region is incorporated to enhance breakdown voltage, then the breakdown voltage is improved, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The invention extracts and eliminates the p-type semiconductor region from the conventional structure, achieving high breakdown voltage without requiring p-type doping or p-type regions. The n-type semiconductor layer with carefully controlled doping profiles and thickness replaces the need for p-type regions, simplifying the device structure while maintaining or improving breakdown characteristics.
Solution Approach 2:
The invention changes the doping parameters (concentration, depth, profile) of the n-type semiconductor layer to achieve optimal breakdown voltage. By adjusting the doping concentration in the first and second regions, the depletion layer width and electric field distribution are optimized, enabling high breakdown voltage without p-type regions.
2Reliability
If a p-type semiconductor region is incorporated to enhance breakdown voltage, then the breakdown voltage is improved, but the manufacturing process becomes more difficult
Solution Approach 1:
The invention removes the p-type semiconductor region and associated p-type doping processes from the manufacturing flow. The structure is formed using only n-type doping, which simplifies the ion implantation or diffusion processes and reduces the number of manufacturing steps required.
Solution Approach 2:
The invention optimizes the n-type doping parameters (concentration, depth, profile shape) to achieve the desired electrical characteristics through a single doping system, eliminating the need for complex multi-step doping processes that would be required for p-type region formation.
3Ease of manufacture
If the semiconductor layer structure is simplified to reduce complexity, then the ease of manufacture is improved, but the breakdown voltage enhancement is reduced
Solution Approach 1:
The invention applies local quality by creating distinct regions within the n-type semiconductor layer with different doping concentrations. The first region has a higher doping concentration near the surface, while the second region has a lower doping concentration at greater depths, optimizing both the ease of manufacture and the breakdown voltage characteristics through localized property variation.
Solution Approach 2:
The invention addresses the breakdown voltage requirement by transitioning from a single-layer structure to a multi-layer n-type structure with varying doping profiles in the depth dimension. This dimensional approach allows optimization of electrical fields and depletion regions without adding horizontal complexity or p-type regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively enhances the breakdown voltage of the semiconductor device without requiring a p-type semiconductor region, while also reducing electric field concentration at the outer peripheral edge of the Schottky electrode.
Implementation Method 1
ion implanting an impurity element into a portion of the semiconductor layer to a depth of 1.0 μm or more from an upper surface of the semiconductor layer
Data Source
AI summary
Provided a semiconductor device including: a semiconductor layer; and an electrode disposed on the semiconductor layer directly or via another layer, the semiconductor layer including a first region containing, as a major component, a crystalline oxide semiconductor containing gallium, and a second region containing, as a major component, an oxide containing gallium, the second region and the first region each containing an impurity element, a maximum value of a concentration of the impurity element in the second region being located at a depth of 1.0 μm or more from an upper surface of the semiconductor layer and being greater than a maximum value of a concentration of the impurity element in the first region.