Gallium Oxide Multilayer Structure for Thermal Expansion Matching
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Solution Overview
Problem
Semiconductor multilayer structures using gallium oxide face degradation issues due to warpage and cracking at high temperatures, particularly in power devices, caused by mismatched coefficients of linear expansion between the semiconductor layer and the conductive substrate during the manufacturing process.
Innovation Solution
A multilayer structure is designed with a crystalline oxide semiconductor layer and a conductive substrate, where the substrate has distinct coefficients of linear expansion in different directions, ensuring that the semiconductor layer's expansion coefficients are similarly matched, reducing thermal stress and degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a multilayer structure is formed with a semiconductor layer and conductive substrate, then the device can achieve high breakdown voltage and low loss, but warpage and cracking occur at high temperatures due to mismatched coefficients of linear expansion
Solution Approach 1:
The patent applies parameter changes by carefully selecting and matching the coefficients of linear expansion of the conductive substrate and semiconductor layer. The conductive substrate is chosen to have a coefficient of linear expansion between 5-15 ppm/K, which matches the semiconductor layer's coefficient, thereby reducing thermal stress and preventing warpage and cracking at high temperatures while maintaining the multilayer structure's reliability
Solution Approach 2:
The patent uses composite materials by combining the semiconductor layer with a specifically selected conductive substrate that has matched thermal expansion properties. This composite structure integrates both the electrical performance requirements (high breakdown voltage, low loss) and thermal stability requirements, creating a unified multilayer system that resists warpage and cracking
2Manufacturing precision
If the multilayer structure is heated during manufacturing, then the semiconductor properties can be optimized, but stress-induced cracking occurs due to differential thermal expansion
Solution Approach 1:
The patent resolves this contradiction by changing the thermal expansion parameter of the conductive substrate to match the semiconductor layer. By selecting a substrate with a coefficient of linear expansion between 5-15 ppm/K, the differential thermal expansion during heating is minimized, allowing semiconductor property optimization through heat treatment without inducing stress-induced cracking
3Ease of manufacture
If materials with different thermal expansion coefficients are used, then ease of manufacture is improved, but degradation at high temperatures occurs
Solution Approach 1:
The patent applies parameter changes by establishing a specific range for the coefficient of linear expansion of the conductive substrate (5-15 ppm/K). This parameter constraint ensures that while material selection remains flexible within this range, all selected materials will provide adequate degradation resistance at high temperatures, balancing ease of manufacture with reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces degradation and cracking of the semiconductor layer at high temperatures, enhancing the reliability and performance of power devices by aligning the thermal expansion characteristics of the substrate and semiconductor layer.
Implementation Method 1
a first coefficient of linear expansion being a coefficient of linear expansion in the first direction of the conductive substrate is smaller than a second coefficient of linear expansion being a coefficient of linear expansion in the second direction of the conductive substrate, and a third coefficient of linear expansion being a coefficient of linear expansion in the first direction of the semiconductor layer is smaller than a fourth coefficient of linear expansion being a coefficient of linear expansion in the second direction of the semiconductor layer
Data Source
AI summary
Provided a multilayer structure including at least: a semiconductor layer containing a crystalline oxide semiconductor as a major component; and a conductive substrate layered on the semiconductor layer, wherein the multilayer structure has a first direction in a plane perpendicular to a layering direction of the multilayer structure and a second direction perpendicular or substantially perpendicular to the first direction, and a first coefficient of linear expansion being a coefficient of linear expansion in the first direction of the conductive substrate is smaller than a second coefficient of linear expansion being a coefficient of linear expansion in the second direction of the conductive substrate, and a third coefficient of linear expansion being a coefficient of linear expansion in the first direction of the semiconductor layer is smaller than a fourth coefficient of linear expansion being a coefficient of linear expansion in the second direction of the semiconductor layer.