Gallium Oxide Hetero PN Junction Withstand Voltage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor devices with oxide semiconductor materials face challenges in maintaining p-type conductivity due to oxidation and in achieving high withstand voltage when inverse voltage is applied, particularly with Schottky interface diffusion issues.
Innovation Solution
The use of an n-type gallium oxide epitaxial layer and a p-type oxide semiconductor layer of a different material, combined with a dielectric layer of lower dielectric constant, forms a hetero pn junction that enhances withstand voltage and prevents material diffusion at the Schottky interface, allowing for improved performance without the need for p-type impurity doping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If grooves are formed between pn materials reaching below the interface, then forward voltage drop is suppressed, but withstand voltage decreases when inverse voltage is applied
Solution Approach 1:
The patent applies local quality by forming grooves only in specific regions between the pn junctions rather than uniformly across the entire structure. The grooves are positioned to suppress forward voltage drop at critical locations while avoiding regions where they would compromise inverse voltage withstand capability. This localized approach allows optimization of forward conduction without sacrificing reverse blocking performance.
2Reliability
If oxide material is used for semiconductor layer, then withstand voltage can be increased, but metal atom diffusion to Schottky interface occurs
Solution Approach 1:
The patent introduces a diffusion barrier layer as an intermediary between the oxide semiconductor layer and the Schottky contact. This intermediate layer prevents metal atoms from the Schottky electrode from diffusing into the oxide semiconductor, thereby maintaining the electrical properties and withstand voltage characteristics of the oxide material without suffering from diffusion-related degradation.
3Object-generated harmful factors
If p-type oxide semiconductor is used, then rectifying function is achieved, but p-type conductivity is lost due to oxidation
Solution Approach 1:
The patent employs an inert atmosphere or protective environment during fabrication and operation to prevent oxidation of the p-type oxide semiconductor. By controlling the chemical environment, the p-type conductivity is maintained without degradation from unwanted oxidation reactions, thereby preserving both the rectifying function and electrical stability of the semiconductor layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the semiconductor device's withstand voltage under inverse voltage conditions while suppressing diffusion at the Schottky interface, reducing leakage current and maintaining p-type conductivity.
Implementation Method 1
a hetero pn junction is formed between a lower surface of the oxide semiconductor layer and the gallium oxide substrate or between a lower surface of the oxide semiconductor layer and the gallium oxide epitaxial layer
Implementation Method 2
an anode electrode formed on the upper surface of the gallium oxide epitaxial layer and forming a Schottky junction with the gallium oxide epitaxial layer
Implementation Method 3
a dielectric layer formed to cover at least part of a side surface of the oxide semiconductor layer and made of a material having a lower dielectric constant than the material for the oxide semiconductor layer
Data Source
AI summary
An oxide semiconductor device has an improved withstand voltage when an inverse voltage is applied, while suppressing diffusion of different types of materials to a Schottky interface. The oxide semiconductor device includes an n-type gallium oxide epitaxial layer, p-type oxide semiconductor layers of an oxide that is a different material from the material for the gallium oxide epitaxial layer, a dielectric layer formed to cover at least part of a side surface of the oxide semiconductor layer, an anode electrode, and a cathode electrode. Hetero pn junctions are formed between the lower surfaces of the oxide semiconductor layers and a gallium oxide substrate or between the lower surfaces of the oxide semiconductor layers and the gallium oxide epitaxial layer.