Source/Drain Contact Formation with Gallium Oxide Strain Protection
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Solution Overview
Problem
The challenge in forming source/drain contacts for small-scaled transistors, such as FinFETs, is that the recess process often results in strain loss due to the removal of pre-strained epitaxial materials, leading to undesirable device performance.
Innovation Solution
The method involves implanting gallium into the source/drain feature of p-type FinFETs and oxidizing it with an oxygen-containing etchant to form gallium oxide, which retards the etching rate and prevents strain loss, while maintaining different raised heights between n-type and p-type features to lower contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the recess process is performed to lower contact resistance, then contact resistance is reduced, but strain loss occurs due to removal of pre-strained epitaxial materials
Solution Approach 1:
The patent applies preliminary action by forming a protective layer on the source/drain features before the recess process. This protective layer is deposited in advance to prevent the removal of pre-strained epitaxial materials during subsequent etching, thereby preserving strain while enabling the recess process to proceed for lowering contact resistance.
Solution Approach 2:
The patent introduces an intermediary protective layer that acts as a mediator between the recess process and the source/drain features. This intermediate layer allows the recess process to occur while blocking the harmful effect of strain loss, enabling both contact resistance reduction and strain preservation.
2Reliability
If different raised heights are maintained between n-type and p-type features, then contact resistance is lowered, but process complexity increases
Solution Approach 1:
The patent applies local quality by selectively depositing protective layers on specific regions (n-type or p-type source/drain features) that require different treatment. This allows different raised heights to be achieved for different feature types, optimizing contact resistance while managing process complexity through targeted rather than universal treatment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces strain loss in the source/drain features and lowers contact resistance by maintaining built-in strain, thereby enhancing the performance of semiconductor devices.
Implementation Method 1
implanting gallium into the source/drain feature of p-type FinFETs
Implementation Method 2
oxidizing it with an oxygen-containing etchant to form gallium oxide
Data Source
AI summary
Semiconductor devices and methods of forming the same are provided. In one embodiments, a semiconductor device includes an n-type transistor region and a p-type transistor region. The n-type transistor region includes a first gate stack, a first gate spacer over sidewalls of the first gate stack, an n-type epitaxial feature in a source/drain (S/D) region of the n-type transistor region, and a first metal silicide layer over the n-type epitaxial feature. The p-type transistor region includes a second gate stack, a second gate spacer over sidewalls of the second gate stack, a p-type epitaxial feature in an S/D region of the p-type transistor region, a dopant-containing implant layer over the p-type epitaxial feature, and a second metal silicide layer over the dopant-containing implant layer. The dopant-containing implant layer includes a metallic dopant.