Galvanic Isolation Capacitor Layout for High-Voltage IC Reliability
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Solution Overview
Problem
In high voltage applications, galvanic isolation capacitors in integrated circuits (ICs) experience breakdown due to high electric field peaks, leading to undesired current flow and reduced isolation capability.
Innovation Solution
Implementing a galvanic isolation capacitor with a specific distance and buffer dielectric layers, including a polyimide layer, to reduce electric field peaks and enhance isolation by increasing the distance between capacitor plates and the polyimide layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a galvanic isolation capacitor is used in high voltage applications, then galvanic isolation between circuits is achieved, but electric field peaks cause breakdown and reduce reliability
Solution Approach 1:
A polyimide layer is introduced as an intermediary buffer between the capacitor top plate and the external environment. This polyimide layer has high dielectric strength and serves as a mediator that withstands high electric field peaks, preventing breakdown of the capacitor structure while maintaining galvanic isolation functionality.
Solution Approach 2:
The capacitor structure uses composite material construction with multiple dielectric layers including polyimide and other buffer dielectric layers. This composite approach combines materials with complementary properties to achieve both high voltage withstand capability and effective galvanic isolation, reducing electric field peaks through material composition rather than single-material reliance.
2Reliability
If the distance between capacitor plates is increased to reduce electric field peaks, then breakdown risk decreases, but capacitor area and device size increase
Solution Approach 1:
By using composite dielectric materials with high breakdown voltage ratings such as polyimide, the capacitor can maintain small plate spacing while achieving high voltage withstand capability. The superior dielectric properties of the composite material allow compact design without sacrificing reliability.
Solution Approach 2:
The invention changes the dielectric parameters by selecting materials with high dielectric strength and appropriate permittivity. This allows optimization of the capacitor geometry - maintaining small area while achieving the required voltage breakdown resistance through material parameter selection rather than geometric scaling.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces the likelihood of system breakdown and enhances isolation capability by minimizing electric field peaks, thereby improving the reliability of ICs in high voltage applications.
Implementation Method 1
Incorporating a polyimide layer and buffer dielectric layers in the IC die with a galvanic isolation capacitor, where the distance from the capacitor top plate to the polyimide layer is at least 30% of the distance between the capacitor plates, reduces electric field peaks and mitigates breakdown risks.
Data Source
AI summary
The present disclosure generally relates to a capacitor on an integrated circuit (IC) die. In an example, a package includes first and second IC dice. The first IC die includes a first circuit, a capacitor, and a polyimide layer. The first circuit is on a substrate. The capacitor includes a bottom plate over the substrate and a top plate over the bottom plate. The polyimide layer is at least partially over the top plate. A distance from a top surface of the top plate to a bottom surface of the polyimide layer is at least 30% of a distance from a top surface of the bottom plate to a bottom surface of the top plate. A signal path, including the capacitor, is electrically coupled between the first circuit and a second circuit in the second IC die, which does not include a galvanic isolation capacitor in the signal path.