Galvanic Isolation Metal Cap Layout for Lower Edge Electric Fields

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Solution Overview

Problem

Existing GI devices face issues with high electric fields and voltages causing ageing mechanisms in polymeric stacks, leading to reduced fabrication yield and increased production costs due to thicker dielectric layers, which complicate the manufacturing process.

Innovation Solution

The solution involves recessing the top metal edges from the cap edges by a specific distance, forming a decoupling arrangement, and optionally increasing the thickness of the buffer layer to reduce electric field intensity in the polymeric stack, thereby mitigating ageing mechanisms without complicating the fabrication process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the thickness of the second dielectric layer is increased to reduce electric field intensity in the polymeric stack, then the Time-To-Failure (TTF) and reliability are improved, but the manufacturing process becomes more complex and difficult

Engineering Contradiction:
ImproveTime-To-Failure (TTF)VSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The device is segmented into distinct functional regions: a first region with the top metal layer and buffer layer for electrical function, and a second region with the thinned second dielectric layer and polymeric stack for reduced electric field exposure. This segmentation allows the polymeric stack to be positioned where electric field intensity is naturally lower, eliminating the need to increase the overall thickness of the second dielectric layer across the entire device, thus maintaining manufacturing simplicity while improving reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second dielectric layer is designed with non-uniform thickness: thicker in the first region under the top metal layer where high electric fields are generated, and thinned in the second region where the polymeric stack is positioned. This local variation in thickness optimizes the electric field distribution, providing sufficient insulation where needed while reducing field intensity in the polymeric stack region, thereby improving TTF without complicating the manufacturing process.

Inventive Principle:
Principle #3Local quality

2Reliability

If high electric fields and voltages are applied to achieve galvanic isolation functionality, then the electrical performance is improved, but ageing mechanisms occur in the polymeric stack leading to reduced product lifetime

Engineering Contradiction:
Improveelectrical performanceVSAvoidproduct lifetime
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The second dielectric layer acts as an intermediary between the high electric field generated by the top metal layer and the polymeric stack. By positioning the polymeric stack in a region where the second dielectric layer provides field shielding and by thinning the dielectric layer in controlled regions, the harmful electric field is meditated before reaching the polymeric stack, reducing ageing mechanisms while maintaining the necessary galvanic isolation electrical performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention addresses the electric field issue by transitioning from a uniform thickness approach to a spatially varying thickness distribution in the second dielectric layer. By creating regions of different thicknesses, the electric field intensity is modulated in the vertical dimension, allowing the polymeric stack to be positioned in a low-field region while maintaining adequate insulation in high-field regions, thus protecting against ageing without compromising electrical performance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If thicker dielectric layers are used to reduce electric field intensity, then the ageing mechanisms are mitigated, but the fabrication yield decreases and production costs increase

Engineering Contradiction:
Improveageing resistanceVSAvoidfabrication yield
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The device structure is segmented to position the polymeric stack in a specific region where the second dielectric layer is thinned, creating a localized low-field zone. This segmentation allows the majority of the device to use standard-thickness dielectric layers that are easy to manufacture, while only a specific region has optimized thickness for ageing resistance, thereby maintaining high fabrication yield and low production costs while still protecting against ageing mechanisms.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces electric field intensity in the polymeric stack, improving Time-To-Failure (TTF) and product lifetime while maintaining a simpler manufacturing process.

Implementation Method 1

a buffer layer of dielectric material extending above the top metal layer and above a lateral portion of the first dielectric layer laterally to the top metal layer

Methodology Applied
Scientific EffectDielectric shielding: Dielectric

Implementation Method 2

The bottom metal layer 114, the first dielectric layer 112 and the top metal layer 116 form a capacitor through which different portions of an electrical system (not shown) can be coupled for the transmission of electrical signals, at the same time being isolated from each other to avoid direct current flows

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS20260018509A1Electronic device with reduced electric fields in superficial layers and fabrication method thereof
Publication Date: 2026.01.15 STMICROELECTRONICS INT NV
  • US20260018509A1 patent drawing
  • US20260018509A1 patent drawing
  • US20260018509A1 patent drawing

AI summary

A galvanic-isolation device includes a metal cap layer extending above a top metal layer of a galvanic isolation module. The metal cap layer is in electrical contact with the top metal layer at a central portion of the top metal layer. A buffer layer separates the metal cap layer from the top metal layer at peripheral portions of the top metal layer. Electric field peaks at edges of the metal cap layer and the top metal layer are decoupled from one another by recessing the lateral edges of the metal cap layer by a distance (for example, greater than one micrometer) from the corresponding edges of the top metal layer.