Galvanic Isolation Barrier for Four-Wire SPI Master-Slave Linking
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Solution Overview
Problem
Existing linking systems between master and slave devices, such as in data acquisition systems, face challenges in efficiently managing multiple data flow rates using the standard four-wire SPI bus, which can increase complexity and cost when additional lines are added.
Innovation Solution
The system employs a four-wire SPI interface with a galvanic isolation barrier, allowing for multiple data flow rates by using custom signal patterns and modes, such as 8-bit and 32-bit commands, without adding extra wires, and utilizes a counter to differentiate between reset and mode signals, enabling flexible communication while minimizing overhead and component count.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If additional wires are added to the SPI bus to support multiple data flow rates, then the system can accommodate varying data rates, but the device complexity and cost increase
Solution Approach 1:
The patent applies multi-functionality by enabling the standard four-wire SPI bus to support multiple data flow rates (8-bit and 32-bit commands) through custom signal patterns and modes rather than requiring separate wiring for different data rates. The same four wires (SSEL, SCLK, MOSI, MISO) are used universally across all communication modes
Solution Approach 2:
The patent changes the parameters of existing signals to encode different meanings. By using custom signal patterns (specific sequences of SSEL, SCLK, and MOSI signals) to represent different command types and data flow rates, the system can differentiate between 8-bit and 32-bit commands without adding physical wires. The counter mechanism detects these parameter changes in the signal patterns
2Adaptability or versatility
If additional wires are added to support multiple data flow rates, then varying data rates can be accommodated, but the cost increases
Solution Approach 1:
The patent makes the four-wire SPI interface universal for multiple data rates, eliminating the need for additional wires or components that would increase manufacturing cost. The galvanic isolation barrier and counter circuitry are used to enable multiple data flow rates through signal processing rather than physical expansion
Solution Approach 2:
The patent uses signal pattern copying where standard SPI signal sequences are replicated and varied to represent different command types. The same physical wires carry different logical meanings through repeated patterns of SSEL, SCLK, and MOSI signals, avoiding the need for additional hardware copies
3Adaptability or versatility
If custom signal patterns are used to differentiate reset and mode signals, then flexible communication is enabled, but the difficulty of detecting and measuring signals increases
Solution Approach 1:
The patent implements feedback through a counter mechanism that monitors the SCLK signal edges and SSEL signal states to detect custom signal patterns. The counter provides feedback about the number of clock edges and signal transitions, enabling the system to automatically differentiate between reset requests, mode change requests, and data commands based on the detected patterns
Solution Approach 2:
The patent uses preliminary action by establishing known signal patterns before actual data transfer. Reset and mode signals use specific pre-defined sequences of SSEL, SCLK, and MOSI signals that are detected by the counter before normal communication begins, allowing the system to prepare for the appropriate communication mode in advance
Data Source
AI summary
System and methods are provided. In one embodiment, a system includes a master device comprising a first serial peripheral interface (SPI) port having only a first four wires. The system further includes a slave device comprising a second SPI port having only a second four wires. The system additionally includes a galvanic isolation barrier communicatively coupling the first four wires to the second four wires. The master device is configured to use the first four wires to transmit a plurality of signals representative of a reset and of a first communications mode. The first communications mode is used to transfer data between the master device and the slave device.