Integrated Galvanic Isolation Transformer with Rounded Windings

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Solution Overview

Problem

Current integrated transformers for galvanic isolation and power transmission in high-voltage applications face challenges in achieving high isolation voltage, efficient power transfer, and cost reduction due to limitations in material resistance and parasitic capacitance, which are not suitable for integrated circuits.

Innovation Solution

A micro-transformer design with a top winding having rounded corners and a thick dielectric layer between windings, manufactured using advanced micromachining techniques, to reduce electrical field stress and enhance galvanic isolation while enabling power transfer between low-voltage and high-voltage regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional optical couplers or coreless transformers are used for galvanic isolation, then isolation voltage class is achieved, but bandwidth is limited to hundreds of kilohertz and device size is large

Engineering Contradiction:
Improveisolation voltage classVSAvoidbandwidth
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent replaces traditional optical couplers and coreless transformers with an integrated transformer structure that uses planar spiral windings and magnetic core integration. This substitution enables galvanic isolation with significantly improved bandwidth (extending to MHz range) while reducing device size to integrated circuit dimensions, resolving the contradiction between isolation reliability and speed performance

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent implements nesting by integrating the magnetic core within and around the spiral windings, creating a compact transformer structure where the core is positioned inside the winding loops. This nested configuration maximizes magnetic coupling efficiency while minimizing device footprint, achieving high bandwidth and small size simultaneously with maintained isolation voltage class

Inventive Principle:
Principle #7Nested doll (Nesting)

2Volume of stationary object

If integrated coreless transformers are used to reduce size and costs, then device size and costs are reduced, but breakdown voltage and immunity to external fields deteriorate

Engineering Contradiction:
Improvedevice sizeVSAvoidbreakdown voltage
Core Design Contradiction:
Volume of stationary objectVSReliability

Solution Approach 1:

The patent employs composite material construction by combining planar spiral windings with integrated magnetic cores (such as ferrite or nickel-zinc materials). This composite structure provides both the compact size of integrated devices and the high breakdown voltage characteristics of magnetic materials, while the magnetic core enhances immunity to external electromagnetic fields through magnetic shielding effects

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent transitions from two-dimensional planar windings to three-dimensional integrated structures by stacking multiple winding layers and positioning magnetic core segments in vertical and horizontal arrangements. This dimensional expansion increases the effective insulation distance and magnetic coupling area, improving breakdown voltage and external field immunity while maintaining compact footprint

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Loss of energy

If windings of low-resistance material (gold) and high-resistance substrates are used, then power losses are reduced and efficiency is increased, but costs increase and integration with smart power circuits is lost

Engineering Contradiction:
Improvepower lossesVSAvoidintegration with smart power circuits
Core Design Contradiction:
Loss of energyVSEase of manufacture

Solution Approach 1:

The patent optimizes the resistance parameter by using standard copper or aluminum conductive materials with carefully controlled winding geometry (turn count, wire thickness, winding density) rather than relying on expensive gold. This parameter optimization achieves acceptable power loss levels while maintaining compatibility with standard semiconductor manufacturing processes, enabling integration with smart power circuits at reduced cost

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent merges the transformer windings with the smart power circuit substrate by using the same semiconductor manufacturing processes for both the power circuits and the transformer windings. The conductive layers are deposited and patterned in the same fabrication sequence, creating a fully integrated device that combines power switching elements and transformer functions in a single chip, eliminating the need for separate high-resistance substrates and reducing overall system cost

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively increases the isolation voltage class, reduces the risk of dielectric breakdown, and improves the service life of the device by minimizing electrical field stress and parasitic capacitance, thereby enhancing the overall performance and reducing costs.

Implementation Method 1

a thick dielectric layer between windings, manufactured using advanced micromachining techniques, to reduce electrical field stress and enhance galvanic isolation

Methodology Applied
Scientific EffectDielectric insulation: Dielectric

Implementation Method 2

enabling power transfer between low-voltage and high-voltage regions

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Data Source

PatentUS10199370B2Electronic device with integrated galvanic isolation, and manufacturing method of the same
Publication Date: 2019.02.05 STMICROELECTRONICS SRL
  • US10199370B2 patent drawing
  • US10199370B2 patent drawing
  • US10199370B2 patent drawing

AI summary

A method of manufacturing an electronic device for providing galvanic isolation includes forming a dielectric layer on a semiconductor body and integrating, in the dielectric layer, a galvanic isolation module, the integrating including forming a first metal region at a first height of the dielectric layer. A second metal region is formed at a second height greater than the first height of the dielectric layer, the first and second metal regions being at least one of capacitively and magnetically coupleable together. Forming the second metal region includes etching selective portions of the dielectric layer to form at least one trench having a side wall coupled to a bottom wall through rounded surface portions, and filling each trench with metal material to form the second metal region having rounded edges.