Galvanic Solderable Contact for Chip Embedding Packages
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Solution Overview
Problem
Conventional packaging solutions for electronic chips face challenges in achieving reliable and cost-effective solder connections, often resulting in uncontrolled intermetallic layer formation and surface topography issues that affect reliability and reproducibility.
Innovation Solution
The use of galvanic deposition to form a solderable exterior electric contact as a multi-layer structure with distinct borders between metals, specifically a nickel-tin double layer, which suppresses uncontrolled phase formation and allows for efficient, reproducible, and cost-effective manufacturing of packages with a flat, planar surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional solder bumps are used for package connections, then solder connections can be established, but uncontrolled intermetallic layer formation occurs and reliability is reduced
Solution Approach 1:
The patent changes the formation method parameter from conventional solder bump deposition to galvanic deposition. This parameter change enables controlled multi-layer structure formation with distinct metal borders, preventing uncontrolled intermetallic layer formation while maintaining solder connection reliability. The galvanic deposition process allows precise control over layer composition and thickness.
Solution Approach 2:
The patent employs composite material structure by creating a multi-layer electric contact with distinct metal layers (such as nickel and tin) with clear borders between them. This composite structure replaces the homogeneous conventional solder bump, providing controlled intermetallic formation at each interface while maintaining overall connection reliability.
2Reliability
If conventional packaging methods are used, then packages can be manufactured, but surface topography issues occur that affect reliability
Solution Approach 1:
The patent changes the deposition process parameter to galvanic deposition, which produces a flat, planar surface topology. This parameter change eliminates the surface topography issues (such as mounds or uneven surfaces) that occur with conventional methods, thereby improving package reliability while maintaining proper electrical connection.
3Reliability
If expensive materials and complex chemical processes are used for solderable contacts, then reliable connections are achieved, but manufacturing cost increases
Solution Approach 1:
The patent uses cost-effective materials such as nickel and tin in a galvanic deposition process, replacing expensive conventional materials. The galvanic deposition method itself is a simpler, more economical process compared to complex chemical deposition methods, reducing manufacturing cost while maintaining reliable solder connections.
Solution Approach 2:
The patent changes the manufacturing process parameter to galvanic deposition, which is a simpler and more cost-effective process compared to conventional complex chemical processes. This parameter change reduces manufacturing cost while the controlled multi-layer structure ensures reliable solder connections.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the controllability and reliability of solder connections by preventing surface topography issues and allowing for efficient batch manufacturing of packages with high reproducibility and low material usage, while avoiding expensive materials and complex chemical processes.
Implementation Method 1
a solderable exterior electric contact of a package with a laminate-type encapsulant is formed by a galvanic deposition, in particular exclusively by a galvanic deposition
Implementation Method 2
the package is mounted on the mounting base by a solder connection between the solderable exterior electric contact and the solder pad
Data Source
AI summary
A package comprising an electronic chip, a laminate-type encapsulant at least partially encapsulating the electronic chip, a wiring structure extending from the electronic chip up to a contact pad, and a completely galvanically formed solderable exterior electric contact electrically coupled with the electronic chip by being arranged on the contact pad.