In-Package Matching Circuits for GaN Power Amplifier Harmonic Control
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Solution Overview
Problem
Conventional RF power amplifiers with packaged power transistors face challenges in impedance matching due to high parasitic output capacitances, particularly for GaN-based devices, which affect efficiency and linearity, especially in space-limited and broadband applications.
Innovation Solution
Implementing pseudo and true inverse class F amplifier circuits with in-package input and output impedance matching topologies, including a two-stage low-pass filter input matching circuit and a shunt-L output matching circuit, optimized for GaN transistors to manage parasitic output capacitances and harmonics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If PCB matching is used to maximize output power, then output power is improved, but impedance matching becomes more difficult when parasitic output capacitances are high
Solution Approach 1:
The patent applies preliminary action by implementing impedance matching circuits within the device package before the signal reaches the PCB. The input matching circuit and output matching circuit are integrated into the package, performing impedance transformation in advance to account for parasitic capacitances, thereby simplifying PCB matching requirements while maximizing output power.
2Power
If packaged power transistors with high periphery are used, then power density is improved, but parasitic output capacitances increase
Solution Approach 1:
The patent converts the harmful effect of high parasitic output capacitances into a beneficial design feature. By intentionally designing the output matching circuit with specific inductance and capacitance values that resonate at the operating frequency, the parasitic capacitances are transformed into part of the resonant network, enabling inverse class F operation and improving power density.
3Reliability
If in-package impedance matching is implemented, then sensitivity to external load variations is reduced, but device complexity increases
Solution Approach 1:
The patent merges multiple functions into the in-package impedance matching circuits. The input matching circuit and output matching circuit are integrated within the package, combining impedance transformation, harmonic control, and load isolation functions into compact circuit structures, thereby reducing sensitivity to external load variations without excessive complexity increase.
4Area of stationary object
If space-limited design is enforced, then compactness is improved, but impedance matching becomes more challenging
Solution Approach 1:
The patent applies dimensionality change by transitioning from two-dimensional PCB matching to three-dimensional in-package matching. The input and output matching circuits are integrated within the package volume, utilizing vertical stacking and compact layouts to achieve impedance matching in a limited footprint, thereby maintaining compactness while enabling effective impedance transformation.
Data Source
AI summary
A power amplifier device includes an amplification path implemented within a power amplifier package. The amplification path includes input and output package leads, a transistor die with transistor input and output terminals and a power transistor, and a two-stage input impedance matching circuit electrically coupled between the input package lead and the transistor input terminal. The two-stage input impedance matching circuit has a double T-match topology that includes a first resonator coupled to the first input package lead, and a second resonator coupled between the first resonator and the transistor input terminal. The amplification path also includes an output impedance matching circuit coupled between the transistor output terminal and the first output package lead, and a second output harmonic termination circuit coupled to the first output package lead.