GaN Transistor Bias Control for Memory Effect Suppression

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Solution Overview

Problem

Gallium nitride transistors exhibit memory effects, where the transmission of a current signal depends on a previous signal, leading to unacceptable amplitude contamination in pulse amplifiers, particularly when transmitting pulses with different amplitudes, necessitating efficient controls to eliminate this effect.

Innovation Solution

A device and method for controlling the quiescent current in gallium nitride transistors involve a control circuit that continuously measures and compares the current with a target value, adjusting the gate voltage or current to maintain a desired quiescent current, effectively resetting the operating point before each signal transmission to eliminate memory effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If a fixed gate voltage is applied to the transistor, then the operating point is stable, but memory effects cause the quiescent current to change depending on previously transmitted signals

Engineering Contradiction:
Improveoperating point stabilityVSAvoidsignal transmission accuracy
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The patent implements a feedback control mechanism where the quiescent current is continuously monitored and compared against a reference value. Based on this comparison, the gate voltage is dynamically adjusted to maintain the desired quiescent current level, thereby compensating for memory effects while preserving operating point stability.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent transitions from a static fixed gate voltage approach to a dynamic adjustment mechanism. The gate voltage is no longer fixed but is continuously modified based on the detected quiescent current level, allowing the system to adapt to memory effects in real-time while maintaining stable operation.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If the quiescent current is allowed to vary with transmitted signals, then the transistor can adapt to different signal conditions, but amplitude contamination occurs in pulse amplifiers

Engineering Contradiction:
Improvesignal condition adaptationVSAvoidamplitude contamination
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The feedback mechanism monitors the quiescent current and adjusts the gate voltage to maintain a constant reference level. This prevents the quiescent current from varying with transmitted signals, thereby eliminating amplitude contamination while still allowing the transistor to handle different signal conditions through proper biasing.

Inventive Principle:
Principle #23Feedback

3Reliability

If the operating point is reset before each signal transmission, then memory effects are eliminated, but the control system complexity increases

Engineering Contradiction:
Improvememory effect eliminationVSAvoidcontrol system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses a feedback control loop that automatically adjusts the gate voltage to maintain the desired quiescent current. This continuous feedback mechanism eliminates memory effects without requiring complex manual reset procedures or additional switching circuitry, thereby maintaining system simplicity while achieving reliable memory effect elimination.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP3389181B1Device and method for controlling current through a transistor
Publication Date: 2021.02.24 HENSOLDT SENSORS GMBH
  • EP3389181B1 patent drawingFigure 1
  • EP3389181B1 patent drawingFigure 2
  • EP3389181B1 patent drawingFigure 3

AI summary

A device for controlling a quiescent current (Io) through a transistor (50) with a control terminal (52) comprises: a current measuring device (110) for detecting a measured quantity which depends on the quiescent current through the transistor (50); a comparator circuit (120) for comparing the detected measured quantity with a setpoint; and an adjustment circuit (130) configured to apply a voltage value or a current value to the control terminal (52) in a quiescent state of the transistor (50) depending on the comparison, so that the quiescent current (Io) through the transistor (50) has a desired value in the quiescent state.