GaN Buffer Layer Design for Warp Control in Si Substrates

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Solution Overview

Problem

The challenge is to increase the breakdown voltage of semiconductor electronic devices using GaN-based compound semiconductors grown on Si substrates while minimizing warp and preventing epitaxial wafer breakage due to strain and lattice mismatch.

Innovation Solution

A semiconductor electronic device is designed with a buffer layer comprising alternating layers of nitride-based compound semiconductors with varying thicknesses and lattice constants, along with an intermediate layer, to manage strain and reduce warp, allowing for increased epitaxial layer thickness without cracking.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the total layer thickness of epitaxial layers is increased to increase breakdown voltage, then breakdown voltage is improved, but the amount of strain increases causing convex warp and potential wafer breakage

Engineering Contradiction:
Improvebreakdown voltageVSAvoidwarp of epitaxial wafer
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The buffer layer is segmented into multiple composite layers (first buffer layer with GaN layers and AlN layers, second buffer layer with AlGaN layers) instead of a single thick buffer layer. This segmentation allows the total buffer layer thickness to be increased while distributing the strain across multiple thinner alternating layers, preventing excessive convex warp and enabling the epitaxial layer thickness to be increased for higher breakdown voltage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the compositional parameters of the buffer layer by using alternating layers with different lattice constants and thermal expansion coefficients (GaN, AlN, and AlGaN with varying Al content). This parameter variation allows precise control of strain distribution, enabling the buffer layer thickness to be optimized for both high breakdown voltage and minimal warp.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a buffer layer is provided between Si substrate and GaN layer to relax strain, then crystal quality is improved, but convex warp occurs in the epitaxial wafer

Engineering Contradiction:
Improvecrystal qualityVSAvoidconvex warp of epitaxial wafer
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The buffer layer is constructed as a composite material system with alternating layers of GaN, AlN, and AlGaN. This composite structure combines materials with different lattice constants and thermal expansion coefficients to create a buffer layer that relaxes strain while controlling warp through the alternating composition pattern.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The invention introduces compositional dynamics into the buffer layer by using AlGaN layers with varying aluminum content between the GaN and AlN layers. This dynamic composition adjustment allows fine-tuning of the strain relaxation characteristics, enabling the buffer layer to maintain crystal quality while reducing convex warp.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration achieves a high breakdown voltage and reduced warp, preventing epitaxial wafer breakage and improving crystal quality, as demonstrated by the fabrication of field effect transistors with superior breakdown voltages and minimal warp.

Implementation Method 1

there are large differences in lattice constant and thermal expansion coefficient between Si and GaN. Therefore, when a GaN layer is grown directly on a Si substrate, a large tensile strain is created in the GaN layer

Methodology Applied
Scientific EffectLattice mismatch strain:

Implementation Method 2

there are large differences in lattice constant and thermal expansion coefficient between Si and GaN

Methodology Applied
Scientific EffectThermal expansion coefficient difference: Thermal Expansion

Implementation Method 3

A lamination structure constituted by GaN layers and AlN layers is effective as the buffer layer... by forming the buffer layer constituted by composite layers of GaN layer and AlN layer, it is possible to epitaxially grow a GaN layer with no crack included

Methodology Applied
Scientific EffectStrain relaxation: Stress Relaxation

Data Source

PatentUS8067787B2Semiconductor electronic device
Publication Date: 2011.11.29 FURUKAWA ELECTRIC CO LTD
  • US8067787B2 patent drawing
  • US8067787B2 patent drawing
  • US8067787B2 patent drawing

AI summary

A semiconductor electronic device comprises a substrate; a buffer layer formed on the substrate, the buffer layer including not less than two layers of composite layer in which a first semiconductor layer formed of a nitride-based compound semiconductor layer having a lattice constant smaller than a lattice constant of the substrate and a thermal expansion coefficient larger than a thermal expansion coefficient of the substrate and a second semiconductor layer formed of a nitride-based compound semiconductor having a lattice constant smaller than a lattice constant of the first semiconductor layer and a thermal expansion coefficient larger than a thermal expansion coefficient of the substrate are alternately laminated; an intermediate layer provided between the substrate and the buffer layer, the intermediate layer being formed of a nitride-based compound semiconductor having a lattice constant smaller than a lattice constant of the first semiconductor layer and a thermal expansion coefficient larger than a thermal expansion coefficient of the substrate; and a semiconductor active layer formed on the buffer layer, the semiconductor active layer being formed of a nitride-based compound semiconductor, wherein: thicknesses of the first semiconductor layers in the buffer layer are non-uniform thereamong, and at least one of the first semiconductor layer has a thickness greater than a critical thickness, the critical thickness being a thickness above which a direction of warp caused by the first semiconductor layer to the substrate is inverted.