GaN Buffer Layer Warp Compensation for Crack Resistance

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The challenge in manufacturing compound semiconductor devices, such as AlGaN/GaN HEMTs, is the generation of warp and crack due to thermal contraction when thick GaN layers are formed on Si substrates, which restricts the improvement of dielectric breakdown withstand voltage and quality, despite efforts to increase nitride layer thickness.

Innovation Solution

A compound semiconductor lamination structure with a buffer layer containing an impurity, specifically a first and second buffer layer with controlled impurity concentrations and lattice constants, is used to form a nitride semiconductor device, where the second buffer layer is doped with Si to generate an upward convex warp that compensates for the downward convex warp, thereby reducing the likelihood of crack formation and enhancing the thickness of the GaN active layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the thickness of the GaN active layer is increased to reduce defects and improve quality, then the dielectric breakdown withstand voltage is improved, but thermal contraction generates downward convex warp and cracks

Engineering Contradiction:
Improvedielectric breakdown withstand voltageVSAvoidcrack resistance
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent applies preliminary anti-action by forming a buffer layer with specific lattice constant and impurity concentration before forming the thick GaN active layer. This buffer layer pre-compensates for the thermal contraction stress that will occur during cooling, preventing the generation of downward convex warp and cracks even when the GaN layer thickness is increased to improve dielectric breakdown withstand voltage.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The patent changes the parameters of the buffer layer, specifically controlling its lattice constant and impurity concentration, to optimize the compensation effect. By adjusting these parameters, the buffer layer can generate the appropriate upward convex warp to counterbalance the thermal contraction of the thick GaN layer, enabling both high reliability and crack resistance.

Inventive Principle:
Principle #35Parameter changes

2Strength

If complex buffer structures like stepwise AlGaN buffer or SLS buffer are used to suppress warp and crack, then crack resistance is improved, but device complexity and manufacturing time increase

Engineering Contradiction:
Improvecrack resistanceVSAvoidbuffer structure complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The patent extracts the essential function of complex buffer structures (warp and crack suppression) and implements it through a simplified single buffer layer design. By identifying and implementing only the critical parameters (lattice constant and impurity concentration) needed for stress compensation, the patent eliminates the complexity of stepwise or superlattice buffer structures while maintaining crack resistance.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies local quality by concentrating the stress compensation function in a single buffer layer with specifically engineered local properties (lattice constant and impurity concentration). This localized optimization achieves the same effect as complex multi-layer structures but with simpler overall architecture, reducing device complexity and manufacturing time.

Inventive Principle:
Principle #3Local quality

3Reliability

If complex buffer structures are used to enable thick GaN layer formation, then dielectric breakdown withstand voltage is improved, but manufacturing time and raw material consumption increase

Engineering Contradiction:
Improvedielectric breakdown withstand voltageVSAvoidmanufacturing throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the essential stress compensation function from complex multi-step buffer structures and implements it through a single buffer layer with optimized parameters. This reduction in the number of fabrication steps directly decreases manufacturing time and raw material consumption, thereby improving productivity while still enabling thick GaN layer formation for high dielectric breakdown withstand voltage.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent optimizes the parameters of the buffer layer (lattice constant and impurity concentration) to achieve maximum stress compensation efficiency in a single layer. This parameter optimization allows the thick GaN active layer to be formed with appropriate thickness for high reliability without requiring multiple buffer layers, thus improving manufacturing throughput and reducing raw material usage.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for increased thickness of the GaN active layer without generating cracks, improving the dielectric breakdown withstand voltage and reducing dislocation density, while maintaining a simple structure and reducing manufacturing costs.

Implementation Method 1

the coefficient of thermal expansion of GaN is larger than that of Si. Hence, when the temperature is decreased after the active layer 103 is formed, a downward convex warp is generated by thermal contraction

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 2

a downward convex warp is generated by thermal contraction as depicted in a part (b) of FIG. 2

Methodology Applied
Scientific EffectThermal contraction: Thermal Contraction

Data Source

PatentUS9312341B2Compound semiconductor device, power source device and high frequency amplifier and method for manufacturing the same
Publication Date: 2016.04.12 FUJITSU LTD
  • US9312341B2 patent drawing
  • US9312341B2 patent drawing
  • US9312341B2 patent drawing

AI summary

A compound semiconductor device includes: a substrate; and a compound semiconductor lamination structure formed over the substrate, the compound semiconductor lamination structure including a buffer layer containing an impurity, and an active layer formed over the buffer layer.