GaN Cascode Transistor Gate Drive Circuit for Erroneous Turn-On Suppression

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Solution Overview

Problem

GaN-based semiconductor devices face challenges in realizing normally-off operation due to parasitic capacitance and erroneous turn-on issues, particularly in high-voltage power circuits where safety requires reliable normally-off operation.

Innovation Solution

A semiconductor device configuration that includes a normally-off transistor cascode-connected with a normally-on transistor, utilizing a gate drive circuit, capacitors, diodes, and a switch to manage gate potential and prevent erroneous turn-on, allowing for simple circuit design without the need for a negative voltage source.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a normally-on GaN-based transistor is used to achieve high electron mobility and small device size, then productivity and device performance are improved, but reliability deteriorates because normally-off operation cannot be realized

Engineering Contradiction:
Improvedevice performanceVSAvoidnormally-off operation capability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The invention divides the transistor structure into two distinct transistors: a GaN-based normally-on transistor for high-performance switching and a Si-based normally-off transistor for safety control. This segmentation allows each transistor to fulfill its specific function optimally while together achieving both high performance and reliable normally-off operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention uses a composite structure combining GaN-based semiconductor material and Si-based semiconductor material in a cascode configuration. This composite approach leverages the superior electron mobility of GaN while incorporating the normally-off characteristic of Si transistors, resolving the contradiction between performance and safety.

Inventive Principle:
Principle #40Composite materials

2Reliability

If a mirror clamp circuit is added to suppress erroneous turn-on, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveerroneous turn-on suppressionVSAvoidcircuit configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The capacitor is charged during the transistor on-state and automatically discharges to clamp the gate potential when the transistor turns off. This self-service mechanism suppresses erroneous turn-on without requiring external control circuits or additional active components, maintaining circuit simplicity while improving reliability.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The capacitor is pre-charged to a specific voltage level during the transistor on-state before turn-off occurs. This preliminary charging action ensures that when the transistor turns off, the stored charge is immediately available to clamp the gate potential and prevent erroneous turn-on, eliminating the need for complex real-time control circuits.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The configuration effectively suppresses erroneous turn-on and ensures reliable normally-off operation of GaN-based semiconductor devices in high-voltage applications, maintaining circuit simplicity and safety.

Implementation Method 1

a first capacitor (30) having a first end and a second end, wherein the second end is electrically connected to the second gate

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

a first diode (40) having a first anode electrically connected between the second end and the second gate, and a first cathode

Methodology Applied
Scientific EffectDiode rectification: Diode

Data Source

PatentUS10367501B1Semiconductor device
Publication Date: 2019.07.30 KK TOSHIBA
  • US10367501B1 patent drawing
  • US10367501B1 patent drawing
  • US10367501B1 patent drawing

AI summary

A semiconductor device according to an embodiment includes: a normally-off transistor having a first source, a first drain, and a first gate; a normally-on transistor having a second source electrically connected to the first drain, a second drain, and a second gate; a first capacitor having a first end and a second end, wherein the second end is electrically connected to the second gate; a first diode having a first anode electrically connected between the second end and the second gate, and a first cathode; a gate drive circuit electrically connected to the first gate and the first end; and a switch having a third end and a fourth end, wherein the third end is electrically connected to the first end.