GaN Cascode HEMT Device for High Voltage Breakthrough
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Solution Overview
Problem
The challenge lies in fabricating high voltage semiconductor devices with gallium nitride (GaN) on silicon substrates, as thick GaN layers are difficult to grow due to lattice mismatch and deposition challenges, limiting the maximum breakdown voltage of GaN high electron mobility transistor (HEMT) devices to below 1000V.
Innovation Solution
A cascode structure is implemented by connecting two HEMT devices in series, with a diode-connected transistor coupling their gates, allowing the combination to operate as a single high voltage device with a breakdown voltage greater than either individual device, using GaN layers thinner than 10 μm, thereby overcoming the limitations of thick GaN growth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If thick GaN layers are grown to achieve high breakdown voltage, then the breakdown voltage increases, but the manufacturing difficulty increases due to lattice mismatch and deposition challenges
Solution Approach 1:
The patent divides the single thick GaN layer into multiple thinner GaN layers stacked in series. Each thin layer is easier to manufacture with standard deposition processes, while the series connection of multiple layers achieves the equivalent high breakdown voltage of a single thick layer. This segmentation resolves the contradiction by making each individual layer manufacturable while maintaining the overall high voltage capability.
Solution Approach 2:
The patent creates a composite structure combining multiple GaN layers with different thicknesses and compositions, along with alternating dielectric layers. This composite approach allows each GaN layer to be within the manufacturable thickness range while the composite structure as a whole achieves the required high breakdown voltage through the series connection of multiple breakdown-resistant elements.
2Reliability
If thick GaN layers are used to achieve high breakdown voltage, then the voltage handling capability improves, but the deposition complexity increases
Solution Approach 1:
The deposition process is segmented into multiple stages, each depositing a thin GaN layer within the capability range of existing deposition equipment. The alternating dielectric layers are deposited between the GaN layers. This segmentation of the deposition process reduces the complexity of each individual deposition step while achieving the cumulative voltage handling capability through the multi-layer structure.
Solution Approach 2:
Instead of increasing the thickness in one dimension (single thick GaN layer), the patent transitions to a multi-dimensional approach by stacking multiple thin layers vertically with dielectric interleavers. This dimensional transformation allows the structure to achieve high voltage capability through the series connection of multiple layers, reducing the deposition complexity of each individual layer while maintaining overall reliability.
3Device complexity
If single HEMT device is used, then the device structure is simple, but the breakdown voltage is limited to below 1000V
Solution Approach 1:
The single HEMT device is segmented into multiple HEMT devices connected in series, with each device containing thinner GaN layers. The gate structures of these HEMTs are coupled through diode-connected transistors to ensure proper voltage distribution. This segmentation allows each individual device to have a simpler structure within manufacturing limits, while the series combination achieves the required high breakdown voltage.
Solution Approach 2:
Diode-connected transistors are introduced as intermediary elements between the gate structures of adjacent HEMT devices. These intermediaries couple the gates together, ensuring that the voltage is properly distributed across the series-connected devices and that each device operates within its safe voltage range, thereby enabling the overall structure to achieve high breakdown voltage while maintaining manageable individual device complexity.
Data Source
AI summary
The present disclosure relates to a semiconductor device including a first high electron mobility transistor (HEMT) device disposed within a semiconductor structure and having a first source, a first drain, and a first gate; a second HEMT device disposed within the semiconductor structure and having a second source, a second drain, and a second gate, the second source coupled to the first drain; and a diode-connected transistor device disposed within the semiconductor structure and comprising a third source, a third gate, and a third drain, the third drain coupled to the second gate.