GaN Power Devices on Engineered Substrate with CTE Matching
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Solution Overview
Problem
Gallium nitride based power devices grown on sapphire substrates experience adverse effects due to heteroepitaxial growth, including reduced uniformity and impaired electronic/optical properties, necessitating improved methods and systems for epitaxial growth processes and substrate structures.
Innovation Solution
The development of power devices and semiconductor diodes using epitaxial growth on engineered substrate structures with a coefficient of thermal expansion (CTE) matched to the epitaxial layers, comprising a polycrystalline ceramic core, adhesion layers, barrier layers, bonding layers, and single crystal layers, which reduces stress and enhances device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If gallium nitride based power devices are grown on sapphire substrates using heteroepitaxial growth process, then the devices can be fabricated, but the epitaxially grown material exhibits reduced uniformity and reduced electronic/optical properties
Solution Approach 1:
The patent introduces an engineered substrate structure with multiple intermediate layers (adhesion layer, barrier layer, bonding layer, single crystal layer) between the sapphire substrate and the gallium nitride epitaxial layers. This intermediary structure mediates the interface between dissimilar materials, improving uniformity and electronic/optical properties by reducing direct heteroepitaxial growth defects
Solution Approach 2:
The patent employs a composite substrate structure combining sapphire, adhesion layers, barrier layers, bonding layers, and single crystal layers. This composite approach allows each layer to contribute specific properties (thermal stability, adhesion, barrier functionality, crystal structure) that collectively improve the overall device performance and reduce the adverse effects of heteroepitaxial growth
2Ease of manufacture
If heteroepitaxial growth process is used on sapphire substrates, then power devices can be manufactured, but stress is generated in the epitaxial layers
Solution Approach 1:
The patent modifies the substrate structure parameters by introducing multiple intermediate layers with specific material properties and thicknesses. These parameter changes in the substrate structure enable stress management and reduction in the epitaxial layers while maintaining ease of manufacture through established fabrication processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces stress in epitaxial layers, minimizing defects and improving electrical and optical properties, leading to enhanced device performance, reliability, and reduced thermal-related failures.
Implementation Method 1
the substrate structure is characterized by a coefficient of thermal expansion (CTE) that is substantially matched to epitaxial layers that form the power devices
Implementation Method 2
a first adhesion layer coupled to the polycrystalline ceramic core
Implementation Method 3
a barrier layer coupled to the first adhesion layer
Data Source
AI summary
An integrated circuit device includes an engineered substrate including a substantially single crystal layer and a buffer layer coupled to the substantially single crystal layer. The integrated circuit device also includes a plurality of semiconductor devices coupled to the buffer layer. The plurality of semiconductor devices can include a first power device coupled to a first portion of the buffer layer and a second power device coupled to a second portion of the buffer layer. The first power device includes a first channel region comprising a first end, a second end, and a first central portion disposed between the first end and the second end. The second power device includes a second channel region comprising a third end, a fourth end, and a second central portion disposed between the third end and the fourth end.