GaN Power Rail ESD Clamp Using Rectifier-Triggered Discharge
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Solution Overview
Problem
Gallium nitride (GaN) substrates are limited in fabricating n-type semiconductor devices, making it difficult to mitigate electrostatic discharge (ESD) events effectively.
Innovation Solution
A power rail electrostatic discharge (ESD) clamp is integrated into the integrated circuit (IC) on a GaN substrate, comprising an ESD device with an ESD detection circuit, an inverter circuit, a rectifier circuit, and a field effect transistor, which work together to detect and mitigate ESD events by directing excess current through rectifier circuits and discharging it safely.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If GaN substrates are used for IC fabrication, then manufacturing capability and device performance are improved, but ESD protection capability deteriorates due to limited device types (n-type only)
Solution Approach 1:
The patent introduces an intermediary ESD protection circuit comprising a detection circuit, inverter circuit, rectifier circuit, and field effect transistor. This intermediary system detects ESD events and actively redirects discharge current away from the target device, resolving the contradiction by adding a mediating protection layer rather than relying solely on substrate material properties
Solution Approach 2:
The ESD protection circuit is configured to automatically detect ESD events and activate protective measures without external intervention. The detection circuit monitors for ESD conditions and triggers the inverter and rectifier circuits to self-manage the discharge current redirection, enabling the system to protect itself autonomously
2Reliability
If traditional ESD protection methods are used, then ESD events can be mitigated in conventional substrates, but they are ineffective on GaN substrates due to n-type device limitations
Solution Approach 1:
The patent changes the operational parameters of the ESD protection mechanism by using a field effect transistor with configurable conductivity type. The protection circuit can be adapted to match the substrate type (n-type or p-type) by selecting appropriate transistor configurations, thereby maintaining ESD mitigation effectiveness across different substrate technologies
Solution Approach 2:
The ESD protection circuit is designed as a universal solution that can function effectively on both conventional substrates and GaN substrates. The circuit architecture with its detection, inversion, rectification, and active discharge components creates a multi-functional protection system that adapts to different substrate types rather than being limited to a single technology platform
3Reliability
If an ESD clamp circuit is added to protect the target device, then ESD protection is improved, but device complexity increases
Solution Approach 1:
The patent merges multiple protection functions into a single integrated ESD clamp circuit. The detection circuit, inverter circuit, rectifier circuit, and field effect transistor are combined into one cohesive protection unit that operates as a unified system, reducing overall complexity compared to implementing separate protection mechanisms for each function
Solution Approach 2:
The ESD clamp circuit performs preliminary protective actions by pre-configuring the field effect transistor and rectifier circuit to be ready for immediate activation. When an ESD event is detected, the circuit has already positioned components in optimal states for rapid current redirection, reducing the effective response complexity during the actual ESD event
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The ESD clamp effectively mitigates ESD events by reducing the voltage and current exposure to the target device, providing robust protection across various operation voltages and enabling the use of GaN substrates for both n-type and p-type semiconductor devices.
Implementation Method 1
an ESD device with an ESD detection circuit, an inverter circuit, a rectifier circuit, and a field effect transistor, which work together to detect and mitigate ESD events by directing excess current through rectifier circuits and discharging it safely
Data Source
AI summary
This disclosure is directed to a circuit that includes a substrate, a target device on the substrate, and an electrostatic discharge (ESD) device electrically coupled to the target device. The ESD device includes an ESD detection circuit electrically coupled to a first reference voltage supply and a second reference voltage supply, an inverter circuit electrically coupled to the ESD detection circuit and configured to trigger in response to an ESD event on the first or second reference voltage supply, a rectifier circuit electrically coupled to the inverter circuit and configured to rectify a current discharged from the inverter circuit, and a transistor electrically coupled to the rectifier circuit and configured to discharge a remaining current passing through the rectifier circuit.