Two-Step GaN Etching with Increasing Bias Power
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Solution Overview
Problem
Existing etching processes for GaN-based semiconductor materials require multiple equipment and are challenged by the formation of undesirable native oxides and poor uniformity, especially when transitioning between etching silicon-containing insulating layers and GaN-based semiconductor layers.
Innovation Solution
A method involving a two-step etching process using a fluorine-containing etchant with increasing bias power, allowing for sequential etching of both silicon-containing insulating and GaN-based semiconductor layers in the same chamber, enhancing production efficiency and avoiding native oxide formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple etching equipment are used for silicon-containing insulating layer and GaN-based semiconductor layer, then etching selectivity is improved, but device complexity and production cost increase
Solution Approach 1:
The patent combines the etching of silicon-containing insulating layers and GaN-based semiconductor layers into a single etching chamber by optimizing process parameters (bias power, gas composition, pressure). This merging eliminates the need for multiple separate etching equipment while maintaining the required etching selectivity between different materials through precise control of plasma conditions and etchant chemistry.
Solution Approach 2:
The patent employs parameter changes by adjusting bias power, gas composition (CF4, SF6, C4F8), and pressure within the etching chamber to achieve selective etching of silicon-containing insulating layers versus GaN-based semiconductor layers. By dynamically changing these parameters between etching steps, the process maintains high selectivity using a single piece of equipment.
2Reliability
If conventional etching process is used for GaN-based semiconductor materials, then native oxides are formed on the surface, but surface quality deteriorates
Solution Approach 1:
The patent uses an inert gas environment (CF4, SF6, C4F8 plasma) during the etching process to prevent native oxide formation on GaN-based semiconductor surfaces. The fluorine-containing plasma creates a protective fluorinated surface layer that prevents oxidation, while the inert atmosphere maintains surface quality and uniformity throughout the etching process.
Solution Approach 2:
The patent implements continuous in-situ etching without exposing the GaN-based semiconductor surface to air or oxygen-containing environments. By maintaining the plasma environment throughout the process and performing sequential etching of insulating layers and semiconductor layers without breaking vacuum, the process continuously protects the surface from oxide formation while maintaining uniformity.
3Manufacturing precision
If separate etching processes are used for silicon-containing insulating layer and GaN-based semiconductor layer, then etching quality is maintained, but production efficiency decreases
Solution Approach 1:
The patent implements continuous in-situ etching by performing sequential etching of silicon-containing insulating layers and GaN-based semiconductor layers within the same chamber without breaking vacuum or exposing samples to air. This continuous process maintains high etching quality through consistent plasma conditions while significantly improving production efficiency by eliminating transfer time and preventing oxide formation between steps.
Solution Approach 2:
The patent performs preliminary optimization of the etching process parameters (gas composition, bias power, pressure) to enable selective etching of different materials in sequence within a single chamber. This preliminary setup allows the system to automatically switch between etching modes for insulating layers and semiconductor layers, maintaining quality while improving throughput.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the production efficiency of semiconductor devices by enabling in-situ etching of both layers with improved uniformity and reliability, reducing the need for multiple etching equipment and minimizing native oxide issues.
Implementation Method 1
forming a recess in the silicon-containing insulating layer, wherein the first etching step is performed by using a fluorine-containing etchant
Implementation Method 2
applying a first bias power
Data Source
AI summary
A method of fabricating a semiconductor structure includes forming a GaN-based semiconductor layer on a substrate, forming a silicon-containing insulating layer on the GaN-based semiconductor layer, forming a recess in the silicon-containing insulating layer in a first etching step, wherein the first etching step is performed by using a fluorine-containing etchant and applying a first bias power, and enlarging the recess to extend into the GaN-based semiconductor layer in a second etching step, wherein the second etching step is performed by using the same fluorine-containing etchant as the first etching step and applying a second bias power that is greater than the first bias power. In addition, a method of fabricating a high electron mobility transistor is provided.