GaN FET with Segmented Insulating Film for Low Contact Resistance

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Solution Overview

Problem

Conventional GaN-based FETs face high contact resistance and ON-resistance due to the formation of source and drain electrodes on AlN insulating films, which also necessitate lowering impurity concentration to achieve normally-off operation, resulting in decreased carrier mobility.

Innovation Solution

The implementation of a field effect transistor with a channel layer of group-III nitride-based compound semiconductor, an interface layer of AlXInYGa1-X-YN, and an electron supplying layer with a recess that reaches the interface layer, where the source and drain electrodes are formed on the electron supplying layer, and an insulating film is deposited on the recess, allowing for low contact resistance and high carrier mobility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If source and drain electrodes are formed on the AlN insulating film, then leak current is suppressed, but contact resistance and ON-resistance increase

Engineering Contradiction:
Improveleak currentVSAvoidcontact resistance
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The insulating film is segmented into two parts: a first insulating film (AlN) that suppresses leak current, and a second insulating film that has low contact resistance with the source and drain electrodes. This segmentation allows each insulating film to perform its specific function without compromising the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the insulating structure have different properties: the first insulating film (AlN) provides high insulation quality for leak current suppression, while the second insulating film provides low contact resistance quality for electrode contact. This local differentiation of properties resolves the contradiction between insulation and conductivity requirements.

Inventive Principle:
Principle #3Local quality

2Reliability

If impurity concentration of the electron transit layer is lowered to achieve normally-off operation, then fail-safe characteristic is achieved, but carrier mobility decreases

Engineering Contradiction:
Improvenormally-off operationVSAvoidcarrier mobility
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

An interface layer is introduced as an intermediary between the channel layer and the electron supplying layer. This interface layer mediates the interaction between the two layers, enabling the electron supplying layer to provide electrons to the channel layer while the interface layer maintains the normally-off characteristic by controlling the formation of the 2DEG. This allows normally-off operation without requiring low impurity concentration in the electron supplying layer, thus preserving carrier mobility.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances carrier mobility by preventing dispersion caused by interface roughness and levels, achieving low ON-resistance and high mobility through the generation of a 2DEG region via the Piezo effect, while maintaining crystal periodicity and ensuring normally-off operation.

Implementation Method 1

A field effect transistor (FET) having an AlGaN/GaN heterojunction structure is polarized due to the Piezo effect, causing a 2-dimensional electron gas (2DEG) to be formed at the interface.

Methodology Applied
Scientific EffectPiezo effect: Piezoelectric Effect

Implementation Method 2

In the FET 900, a leak current can be suppressed due to the second insulating film 16b

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Data Source

PatentUS8283700B2Field effect transistor and manufacturing method thereof
Publication Date: 2012.10.09 FURUKAWA ELECTRIC CO LTD
  • US8283700B2 patent drawing
  • US8283700B2 patent drawing
  • US8283700B2 patent drawing

AI summary

A field effect transistor includes a channel layer of group-III nitride-based compound semiconductor; an interface layer formed on the channel layer and of AlXInYGa1-X-YN, where 0≦X≦1, 0≦Y≦1, and X+Y≦1, which is different from material of the channel layer, an electron supplying layer of group-III nitride-based compound semiconductor formed on the interface layer, the electron supplying layer having a recess that reaches the interface layer; a source electrode and a drain electrode formed on the electron supplying layer on respective sides of the recess; an insulating film formed on an inner surface of the recess; and a gate electrode formed on the insulating film.