GaN Vertical Fin FET Gate Regrowth Layout for Uniform Channels

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Solution Overview

Problem

Existing methods for regrowing gate regions in vertical fin-based FET structures suffer from non-uniformity, leading to variations in gate thickness, resistivity, and channel lengths, which affect the reliability and performance of semiconductor devices.

Innovation Solution

A semiconductor structure and method that involves arranging fins in predetermined physical layouts to achieve uniform regrowth of the gate layer, ensuring a planar surface and consistent channel lengths by optimizing the fin array design and epitaxial regrowth process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional regrowth methods are used for gate regions in vertical fin-based FET structures, then the manufacturing process is simple, but the regrowth uniformity is poor leading to variations in gate thickness, resistivity, and channel lengths

Engineering Contradiction:
Improveregrowth uniformityVSAvoidfin array structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The fin array is divided into multiple rows and columns with specific spacing relationships. The fins are segmented into first rows and second rows separated by a space, with each row containing fins at different positions. This segmentation allows the regrowth process to achieve uniformity across the entire array by treating different regions with appropriate spacing relationships, rather than attempting to regrow all fins simultaneously as a single unit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the fin array are designed with different local characteristics. The first row and second row of fins are separated by a specific space, and fins within each row have different positions relative to each other. This local variation in spacing and arrangement creates optimal conditions for uniform regrowth across different areas of the array, addressing the non-uniformity problem by tailoring the local structure to facilitate consistent epitaxial growth.

Inventive Principle:
Principle #3Local quality

2Productivity

If fins are arranged in dense arrays to increase device capacity, then the quantity of devices increases, but the regrowth uniformity decreases due to variations in gate thickness and channel lengths

Engineering Contradiction:
Improvedevice capacityVSAvoidgate thickness uniformity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The dense fin array is segmented into multiple rows with spaces between them. The first row and second row are separated by a defined space, and each row contains fins at specific positions. This segmentation reduces the density within each local region while maintaining high overall device capacity through the extended array. The reduced local density allows the regrowth process to achieve uniform gate thickness and channel lengths across all fins.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The fin array is organized in a two-dimensional arrangement with rows and columns, where the second row is positioned at a different location relative to the first row. This dimensional organization creates a pattern where fins are distributed across multiple spatial dimensions rather than being densely packed in a single plane. The spatial distribution across rows and columns with defined spacing relationships enables uniform regrowth while maintaining high device capacity through the extended two-dimensional array structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides uniform regrowth of the gate layer, reducing variations in gate resistivity and channel lengths, thereby enhancing semiconductor device reliability and performance.

Implementation Method 1

a fin array having a plurality of fins surrounding by a recess region that is filled with an epitaxially regrown gate layer

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS12520513B2Regrowth uniformity in GaN vertical devices
Publication Date: 2026.01.06 SEMICON COMPONENTS IND LLC
  • US12520513B2 patent drawing
  • US12520513B2 patent drawing
  • US12520513B2 patent drawing

AI summary

A method of fabricating a semiconductor device includes providing a substrate structure comprising a semiconductor substrate of a first conductivity type, a drift layer on the semiconductor substrate, and a fin array on the drift layer and surrounded by a recess region. The fin array comprises a first row of fins and a second row of fins parallel to each other and separated from each other by a space. The first row of fins comprises a plurality of first elongated fins extending parallel to each other in a first direction. The second row of fins comprises a plurality of second elongated fins extending parallel to each other in a second direction parallel to the first direction. The method also includes epitaxially regrowing a gate layer surrounding the first and second row of fins on the drift layer and filling the recess region.