Monolithic GaN Gate Bias Circuit for Stable Driver Voltage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The lack of complementary P-type devices in gallium nitride (GaN) semiconductor processes limits the design and performance of circuits, as well as the high process variations and costly GaN wafers, which restrict the complexity and density of GaN-based power converters.
Innovation Solution
A predominately GaN-based gate bias circuit is monolithically integrated with the GaN power FET, maintaining optimal gate voltage over process, temperature, and supply voltage variations with a minimum number of external components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If depletion-mode GaN devices are used as power switches, then the device is normally on and can switch quickly, but it requires complicated negative gate drive voltage to turn off or a series device in a different process
Solution Approach 1:
The patent changes the threshold voltage parameter by using enhancement-mode devices with positive VT instead of depletion-mode devices with negative VT. This parameter change allows the device to be normally off and eliminates the need for complicated negative gate drive circuits, resolving the contradiction between switching speed and gate drive complexity
Solution Approach 2:
The patent uses simple, readily fabricatable enhancement-mode GaN devices instead of complex depletion-mode devices requiring negative voltage generation circuits. This simplifies the overall system by eliminating the need for additional voltage generation components
2Productivity
If GaN wafers are used for fabrication, then high switching speed and low switching loss are achieved, but the wafers are costly and packaging densities are low due to large minimum device sizes
Solution Approach 1:
The patent merges the power switch and driver circuits onto a single GaN die, creating an integrated solution. This consolidation reduces the number of external components needed, increases packaging density, and better utilizes the expensive GaN wafer real estate, thereby addressing the cost and density issues
3Ease of manufacture
If simple circuits with limited components are used in GaN technology, then cost-effectiveness is maintained, but design complexity and performance are limited
Solution Approach 1:
By integrating the driver circuitry directly onto the GaN die with the power switch, the patent enables more complex functionality within the same footprint. This integration allows for enhanced design capabilities and performance while maintaining cost-effectiveness, as the integrated circuit requires fewer external components
Data Source
AI summary
An electronic device includes a GaN power FET, a GaN driver coupled to the GaN power FET and a gate bias circuit coupled to the GaN driver. The GaN power FET and the GaN driver are monolithically integrated on a single GaN die. The gate bias circuit is predominately monolithically integrated on the single GaN die and includes only one active component external to the single GaN die. In one embodiment, the only active component external to the single GaN die is a linear regulator. In another embodiment, the only active component external to the single GaN die is a shunt regulator. In yet another embodiment, the only active component external to the single GaN die is a Zener diode.