Integrated GaN Gate Driver with Bootstrap Circuit

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

GaN-based power devices with separate silicon-based gate drivers suffer from parasitic inductances and capacitances, leading to degraded performance under high-frequency switching due to reduced gate-to-source voltage and incomplete power device turn-on, especially with larger threshold voltages, and increased power consumption.

Innovation Solution

An integrated gate driver circuit with a self-bootstrap scheme using a capacitor and diode, which allows rail-to-rail driving signals and reduces parasitic effects, featuring a push-pull circuit with pull-up and pull-down transistors and an inverter stage to enhance charging speed and driving capability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a separate silicon-based gate driver is used with GaN power device, then the gate driver can be implemented with conventional silicon technology, but parasitic inductances and capacitances degrade the circuit performance under high-frequency switching operations

Engineering Contradiction:
Improvegate driver implementationVSAvoidcircuit performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent merges the gate driver circuit and GaN power device into a single integrated structure, eliminating the separate silicon-based gate driver and its associated bonding wires or interconnects. This integration removes the source of parasitic inductances and capacitances while maintaining manufacturability through unified fabrication processes.

Inventive Principle:
Principle #5Merging (Combining)

2Device complexity

If a two-stage gate driver integrated with GaN power device is used, then integration is achieved, but the source current drops quickly with increased output voltage and charging process severely slows down

Engineering Contradiction:
ImproveintegrationVSAvoidcharging speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent modifies the circuit parameters by implementing a bootstrap configuration with a capacitor connected to the output terminal. This capacitor maintains a stable voltage difference between the output terminal and source terminal, ensuring that the gate-to-source voltage remains sufficiently high throughout the charging process. This parameter stabilization prevents the source current drop and maintains fast charging speed even as output voltage increases.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If a two-stage gate driver integrated with GaN power device is used, then integration is achieved, but the amplitude of the output voltage is smaller than the supply voltage and power devices cannot be fully turned on

Engineering Contradiction:
ImproveintegrationVSAvoidturn-on capability
Core Design Contradiction:
Device complexityVSStrength

Solution Approach 1:

The patent introduces a capacitor as an intermediary energy storage element in the bootstrap configuration. This capacitor accumulates charge during the discharge phase and releases it during the charging phase, enabling the output voltage amplitude to reach the full supply voltage level. This intermediary energy storage mechanism ensures that power devices can be fully turned on despite the integrated structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If a larger supply voltage is used in the gate driver circuit, then the gate voltage stress problem is alleviated, but larger power consumption in the driver circuit results

Engineering Contradiction:
Improvegate voltage stressVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent employs periodic charging and discharging action through the bootstrap capacitor. The capacitor is charged during the discharge phase and discharged during the charging phase, creating a periodic energy transfer mechanism. This periodic action allows the use of lower supply voltage while still achieving sufficient gate drive voltage, thereby reducing power consumption while maintaining reliable gate voltage stress margins.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10404251B2Power device with integrated gate driver
Publication Date: 2019.09.03 THE HONG KONG UNIV OF SCI & TECH
  • US10404251B2 patent drawing
  • US10404251B2 patent drawing
  • US10404251B2 patent drawing

AI summary

The technology described herein is generally directed towards a self-bootstrap integrated gate driver circuit with high driving speed, enhanced driving capability and rail-to-rail output. A capacitor and diode are used with a first inverter coupled to a control signal input terminal, a second inverter coupled to the first inverter, a push-pull circuit comprising a pull-up transistor and a pull-down transistor and a power device comprising a power device transistor with a gate. Control signal input at one state controls the first inverter to a first output state, turns on the pull-down transistor to discharge the gate of the power device transistor, turns off the power device and charges the capacitor through the diode. The control signal input in another state controls the first inverter to a second output state, turns off the pull-down transistor and turns on the pull-up transistor via the capacitor to turn on the power device.