GaN Gate Driver and Auto-Zero Comparator for Offset Control

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Solution Overview

Problem

In high-voltage and high-current applications, the lack of P-type devices in Enhancement mode (E-mode) gallium nitride (GaN) processes limits the achievable single stage gain and input common mode range of comparators, leading to large offset voltages due to transistor parameter variations.

Innovation Solution

The implementation of gate driver circuits with self-timed bootstrap circuits that generate voltages greater than VDD to control E-mode GaN transistors without additional voltage rails, and the use of auto-zero loops to reduce input referred offset in comparators, enabling rail-to-rail operation and minimizing DC cross currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If E-mode GaN transistors are used without P-type devices, then device availability and process simplicity are improved, but single stage gain and input common mode range of comparators are limited

Engineering Contradiction:
Improveprocess simplicityVSAvoidinput common mode range
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The comparator is divided into multiple gain stages instead of relying on a single high-gain stage. The first gain stage provides initial amplification while the second gain stage provides additional gain, allowing the system to achieve high overall gain without requiring P-type devices for a single high-gain stage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The input common mode range is extended by adding a third voltage rail (VDD2) above the standard VDD rail. This additional voltage dimension allows the comparator to accept input signals over a wider voltage range, compensating for the limited common mode range that would otherwise result from lacking P-type devices.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Speed

If GaN transistors are used, then switching speed and power efficiency are improved, but parameter variations lead to large offset voltages in comparator circuits

Engineering Contradiction:
Improveswitching speedVSAvoidoffset voltage
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

An auto-zero feedback mechanism is implemented where the offset voltage is measured during a calibration phase and then subtracted from subsequent measurements. The comparator includes feedback circuitry that automatically adjusts for offset errors, maintaining high precision despite GaN transistor parameter variations.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system dynamically adjusts operating parameters to compensate for transistor variations. By changing bias conditions and operating points based on measured offset characteristics, the system maintains consistent performance across different GaN transistor samples with varying parameters.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11394380B2Gate drivers and auto-zero comparators
Publication Date: 2022.07.19 TEXAS INSTRUMENTS INC
  • US11394380B2 patent drawing
  • US11394380B2 patent drawing
  • US11394380B2 patent drawing

AI summary

Gate drivers and auto-zero comparators are disclosed. An example integrated circuit includes a transistor comprising a gate terminal and a current terminal, a gallium nitride (GaN) gate driver coupled to the gate terminal, the GaN gate driver configured to adjust operation of the transistor, and an enhancement mode GaN comparator coupled to at least one of the transistor the GaN gate driver, the enhancement mode GaN comparator configured to compare a voltage to a reference voltage, the voltage based on current from the current terminal, the GaN gate driver configured to adjust the operation of the transistor based on the comparison.