GaN Gate Driver Programming via Asynchronous Serial Interface
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Solution Overview
Problem
Existing gate driver circuits for GaN transistors lack a reliable mechanism for programming and re-programming, especially in the presence of electromagnetic noise and other disturbances, and do not efficiently manage gate control parameters across multiple circuits.
Innovation Solution
A gate driver circuit with an asynchronous serial communication interface that allows for efficient programming and re-programming of GaN transistors, including the ability to forward gate driver parameters to other circuits and an external control circuit, ensuring reliable operation even in noisy environments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If synchronous serial communication interface (e.g., I2C) is used for programming gate driver circuits, then communication reliability can be maintained, but continuous synchronization by common clock signal increases device complexity and power consumption
Solution Approach 1:
The patent extracts and removes the clock signal synchronization requirement from the communication interface. By using an asynchronous serial communication interface instead of synchronous (I2C), the common clock signal line is eliminated, reducing device complexity and pin count while maintaining communication reliability through start/stop bit protocols.
Solution Approach 2:
The patent introduces an intermediary buffer register that temporarily stores incoming communication data before it is processed by the logic unit. This buffer acts as a mediator that decouples the communication interface from the internal logic, allowing asynchronous operation while ensuring reliable data transfer even during transient states or interruptions.
2Adaptability or versatility
If each gate driver circuit is independently programmed by external control circuit, then programming flexibility is maintained, but number of pins and communication overhead increases
Solution Approach 1:
The patent merges multiple gate driver circuits into a single integrated device with a shared communication interface. The logic unit can selectively program any of the multiple gate driver circuits through this single interface, eliminating the need for separate programming pins for each driver and reducing overall pin count while maintaining independent programmability.
Solution Approach 2:
The communication interface and logic unit are designed with universal functionality to handle programming of multiple different gate driver circuits through a single interface. The same interface can program different types of transistors (MOSFET, GaN HEMT, IGBT) with different parameter requirements, providing multi-functionality without increasing pin count.
3Manufacturing precision
If gate driver parameters are fixed during manufacturing, then manufacturing precision can be maintained, but adaptability to different operating conditions and re-programming capability are limited
Solution Approach 1:
The patent implements dynamic re-programming capability where gate driver parameters can be changed during device operation or between operations. The logic unit receives new parameter values through the communication interface and updates the driving signals in real-time, allowing the system to adapt to different operating conditions, temperatures, or load requirements without re-manufacturing.
Solution Approach 2:
The patent enables parameter changes by storing multiple sets of gate driver parameters in memory and selectively loading different parameter sets based on operating conditions. The logic unit can modify driving voltage levels, current limits, switching timings, and other parameters dynamically, providing adaptability while maintaining precise control over each parameter's value.
4Device complexity
If conventional programming mechanisms are used, then simplicity can be maintained, but reliability in presence of electromagnetic noise and disturbances is insufficient
Solution Approach 1:
The patent implements feedback mechanisms where the logic unit monitors the state of gate driver circuits and communicates with external control systems to verify successful parameter programming. This feedback loop allows detection and correction of communication errors caused by electromagnetic noise, ensuring reliable parameter transfer while maintaining relatively simple hardware through protocol-level error checking.
Data Source
AI summary
A gate driver circuit and a corresponding gate driver system is presented. The gate driver circuit may be configured to drive a gallium nitride GaN transistor. The gate driver circuit may comprise a communication interface configured to receive a gate driver parameter. The communication interface may be an asynchronous serial communication interface, such as e.g. an UART communication interface. The gate driver parameter may be forwarded from one gate driver circuit to the next using the asynchronous serial communication protocol. One or more digital isolators may be coupled between the gate driver circuits.