Depletion-Mode GaN Gate Control for Leakage Current Calibration
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Solution Overview
Problem
Depletion mode GaN transistors on GaN wafers experience significant leakage current issues due to unstable threshold voltages and material properties, leading to varying operational efficiencies and speeds, which existing technologies fail to adequately address.
Innovation Solution
A control circuit on a silicon wafer is used to detect and adjust the gate voltage of depletion mode GaN transistors formed on GaN wafers, repeatedly calibrating the voltage to minimize leakage current by making it equal to or close to the threshold voltage, utilizing modules for current detection and voltage adjustment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single gate voltage is used to turn off all depletion mode GaN transistors to ensure none have leakage current, then leakage current is prevented, but operational efficiency and speed are reduced due to overly negative voltage
Solution Approach 1:
The patent applies local quality by individually adjusting the gate voltage for each GaN transistor based on its specific leakage current characteristics. Instead of using a uniform gate voltage for all transistors, each transistor receives a customized voltage level tailored to its unique properties, thereby preventing leakage current while maintaining optimal operational efficiency and speed for each device.
Solution Approach 2:
The patent implements parameter changes by dynamically adjusting the gate voltage parameter for each GaN transistor based on detected leakage current levels. The control circuit modifies the gate voltage parameter individually for each transistor, transforming the fixed voltage approach into a variable voltage system that adapts to each transistor's characteristics, thus resolving the contradiction between leakage prevention and operational performance.
2Reliability
If gate voltage is made more negative to completely turn off depletion mode GaN transistors, then leakage current is prevented, but conversion efficiency during operation is reduced
Solution Approach 1:
The patent applies partial action by adjusting the gate voltage to the minimum necessary level required to prevent leakage current for each individual transistor, rather than applying an excessively negative voltage to all transistors. This ensures adequate shutdown reliability while minimizing the negative impact on conversion efficiency during operation.
3Ease of manufacture
If all depletion mode GaN transistors are adjusted to have the same threshold voltage, then manufacturing simplicity is maintained, but individual transistor performance variations due to fabrication differences are not addressed
Solution Approach 1:
The patent implements local quality by detecting and individually adjusting the gate voltage for each GaN transistor based on its specific leakage current characteristics. This approach moves away from uniform voltage adjustment to customized voltage levels for each transistor, addressing fabrication variations and ensuring consistent leakage current prevention across all devices.
Solution Approach 2:
The patent employs feedback mechanisms by detecting the leakage current of each GaN transistor and using this information to adjust its gate voltage accordingly. This closed-loop control system ensures that each transistor receives the appropriate voltage level to prevent leakage current, compensating for fabrication differences and maintaining reliability across the entire transistor array.
Data Source
AI summary
The invention uses the control circuit formed on the silicon wafer to detect the leakage current of transistor formed on the depletion mode GaN wafer and then adjust the gate voltage of the depletion mode GaN transistor according to the detected leakage current. Essentially, the gate voltage is reduced or viewed as made more negative when the detected leakage current is larger a specific value. Thus, the gate voltage can be gradually adjusted to approach a specific threshold voltage that right block the leakage current. In other words, by making the gate voltage more negative when non-zero leakage current is detected and even by making the gate voltage more positive when zero leakage current is detected, the depletion mode GaN transistor can be adjusted to have an acceptable or even zero leakage current, a high reaction rate and an optimized efficiency.