Ohmic Electrode Structure for GaN Semiconductor Gate Leakage Reduction
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Solution Overview
Problem
Power switching semiconductor devices face challenges in reducing gate leakage current while maintaining normally-off characteristics and fast switching performance, as existing technologies often result in increased gate leakage due to defects and high resistance issues.
Innovation Solution
A semiconductor device structure incorporating a p-type semiconductor layer with AlxInyGa1-x-yN and an ohmic electrode composed of a highly chemically active first metal and a less active second metal, forming a high-resistance junction and Schottky junction with different contact resistivities to manage voltage drops and defects, thereby reducing gate leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a p-type GaN layer is stacked with a gate electrode to achieve fast switching characteristics, then switching speed is improved, but gate leakage current increases
Solution Approach 1:
The patent applies local quality by creating different contact resistivity zones within the gate electrode structure. The gate electrode includes a first region with lower contact resistivity and a second region with higher contact resistivity, allowing each region to perform its specific function: the low-resistance region enables fast switching while the high-resistance region suppresses gate leakage current at defect locations
Solution Approach 2:
The patent changes the contact resistivity parameter spatially within the gate electrode structure. By controlling the composition, crystal structure, or material properties of different regions of the gate electrode, the contact resistivity is adjusted to create a gradient or stepped structure that simultaneously achieves low overall resistance for fast switching while providing high local resistance to block leakage paths
2Loss of energy
If a gate electrode is formed on a p-type GaN layer to reduce on-state resistance, then on-state resistance is reduced, but contact resistance between gate electrode and p-type layer increases
Solution Approach 1:
The gate electrode is segmented into multiple regions with different electrical properties. The first region is optimized for low contact resistivity to ensure reliable electrical connection and reduce on-state resistance, while the second region is optimized for high contact resistivity to suppress leakage. This segmentation allows simultaneous optimization of both conduction and isolation requirements
3Ease of manufacture
If defects are present in the semiconductor device, then manufacturing is simplified, but voltage drop at interfaces increases due to high resistance
Solution Approach 1:
The patent converts the harmful effect of defects into a beneficial design feature by intentionally creating high-resistance regions in the gate electrode that align with expected defect locations. These high-resistance regions act as protective barriers that prevent defects from causing excessive voltage drops or gate leakage, thereby improving device reliability without complicating the manufacturing process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure effectively minimizes gate leakage current, ensures normally-off characteristics, and facilitates fast switching by creating a high-resistance junction and controlling threshold voltage, while also providing tolerance to harsh conditions.
Implementation Method 1
The formation of the gate electrode made of Ti enables hydrogen contained in the p-type GaN layer to be absorbed by Ti, resulting in a higher acceptor ion concentration in the vicinity of the interface.
Implementation Method 2
This structure enables the formation of a high-resistance junction (substantial ohmic junction or Schottky junction with a high contact resistivity) immediately above the outer end of the gate recess.
Data Source
AI summary
A semiconductor device includes: a substrate; a p-type GaN layer that is formed above the substrate, and includes GaN containing p-type impurities; and a Ti film formed on a surface of the p-type GaN layer. The Ti film includes a Ti film containing no nitrogen and a nitrogen-containing Ti film that is less chemically active than such Ti film. The nitrogen-containing Ti film continuously surrounds an outer periphery of the Ti film containing no nitrogen in a planar view.