Monolithic GaN Half-Bridge Circuit for Substrate Bias Control
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Solution Overview
Problem
Existing monolithically integrated GaN-based half-bridge circuits face significant challenges due to the substrate bias effect, which increases on-resistance and power loss, particularly when high-side and low-side transistors experience static and dynamic biases, and current solutions either complicate the manufacturing process or limit the circuit's reliability and frequency performance.
Innovation Solution
A monolithically integrated GaN-based half-bridge circuit is designed with integrated GaN HEMT devices and passive components on the same substrate, where resistors and capacitors are used to stabilize substrate potential, reducing bias effects by connecting the substrate to the source through a resistor and using diodes to manage voltage drops, thereby minimizing static and dynamic biases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the substrate is connected to GND, then the substrate bias effect is reduced, but the high-side transistor experiences severe static negative bias causing significantly increased on-resistance and power loss
Solution Approach 1:
An intermediate potential layer is introduced between the substrate and the high-side transistor source, establishing a floating potential that dynamically adapts to circuit operating conditions. This intermediary structure prevents direct coupling between substrate and transistor, eliminating severe static negative bias while maintaining substrate bias stability.
Solution Approach 2:
The substrate potential connection configuration is changed from fixed (direct GND connection) to dynamic (floating potential through intermediate layer). This parameter change allows the substrate potential to adaptively adjust during operation, avoiding both static negative bias and dynamic positive bias conditions that cause power loss.
2Reliability
If the substrate is connected to the output terminal Vout, then the substrate bias effect is reduced, but the low-side transistor experiences dynamic positive bias causing increased on-resistance and power loss
Solution Approach 1:
The intermediate potential layer acts as a mediator between the substrate and the low-side transistor, preventing direct coupling that causes dynamic positive bias. This intermediary structure filters out voltage transients and switching noise, maintaining stable substrate potential during low-side transistor switching operations.
3Reliability
If dielectric isolation is used to separate high-side and low-side transistors, then substrate bias effect is reduced, but the manufacturing process is complicated and manufacturing yield is reduced
Solution Approach 1:
The complex dielectric isolation structure is extracted and replaced with a simplified intermediate potential layer approach. This extraction eliminates the need for multiple isolation layers and complex patterning steps, reducing manufacturing process complexity while maintaining the essential function of substrate bias effect reduction.
4Loss of energy
If external passive components are used to ameliorate substrate bias effect, then power loss is reduced, but the circuit size increases and reliability requirements are compromised
Solution Approach 1:
The function of external passive components (decoupling capacitors and resistors) is merged into the intermediate potential layer structure integrated on the same substrate. This integration eliminates the need for separate external components, reducing chip area while maintaining the power loss reduction benefits through monolithic fabrication.
Data Source
AI summary
In the monolithically integrated GaN-based half-bridge circuit, a nucleation layer, a buffer layer, a channel layer and a barrier layer are sequentially provided on a conductive substrate, the barrier layer and the channel layer are separated by isolation layers, and a diode, an integrated capacitor, a low-side transistor, a high-side transistor, a first integrated resistor and a second integrated resistor are provided. The half-bridge circuit includes: a low-side transistor and a high-side transistor, wherein a drain of the low-side transistor is connected to a source of the high-side transistor and also connected to an output terminal Vout, and a substrate of the low-side transistor is connected to a substrate of the high-side transistor, wherein a series resistor is connected in parallel to a drain of the high-side transistor and a source of the low-side transistor.