Co-Packaged GaN Half-Bridge Chip for Low-Parasitic Switching

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Solution Overview

Problem

The existing half-bridge driving circuits using discrete components or integrated chips for gallium nitride (GaN) power devices suffer from high parasitic inductance, ringing effects, and heat dissipation issues, which can damage the devices and limit their integration and efficiency.

Innovation Solution

A method for co-packaging a high-voltage starting circuit, logic control circuit, and dedicated driving circuits with GaN power devices in a single chip, using a power quad dual flat pin-free (PDNF) packaging structure, with isolated base island regions and copper sheets for heat dissipation, reducing parasitic parameters and improving heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If discrete components are used for half-bridge driving circuit, then price is low, but integration level is low and application is limited

Engineering Contradiction:
ImprovepriceVSAvoidintegration level
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent merges the driving circuit and GaN power device into a single co-packaged module, integrating multiple functions (high-side driver, low-side driver, starting circuit, logic control) with the power device in one package. This resolves the contradiction by achieving high integration level while maintaining manufacturing simplicity through modular co-packaging technology.

Inventive Principle:
Principle #5Merging (Combining)

2Ease of operation

If pulse triggering transformer drive is used, then implementation is convenient, but manufacturing errors cause signal distortion and transformer is large in size with severe heat emission

Engineering Contradiction:
Improveimplementation convenienceVSAvoidsignal distortion, heat emission, size
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The driving circuit and power device are co-packaged in a single module with direct internal connections, eliminating the external transformer and its associated signal distortion and heat emission problems. This maintains implementation convenience while removing harmful factors.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent extracts and removes the transformer from the system by implementing direct digital driving connections between the driving circuit and GaN device, eliminating the source of signal distortion, heat emission, and large size.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of manufacture

If drive and GaN power device are separated and connected through PCB wiring, then packaging is simple, but parasitic inductance is high causing ringing effect and potential device damage

Engineering Contradiction:
Improvepackaging simplicityVSAvoidparasitic inductance, ringing effect
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The driving circuit and GaN power device are packaged together in a single module with internal connections, dramatically reducing the parasitic inductance of the driving loop compared to external PCB wiring. This maintains packaging simplicity while significantly improving reliability by eliminating ringing effects.

Inventive Principle:
Principle #5Merging (Combining)

4Productivity

If GaN power device operates at high switching frequency, then power density is improved, but switching loss increases without soft switching control

Engineering Contradiction:
Improvepower densityVSAvoidswitching loss
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The integrated logic control circuit provides real-time control feedback to manage the switching operations of the GaN devices, enabling soft switching techniques that reduce switching losses while maintaining high frequency operation for improved power density.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250309220A1Half-bridge topology integration method for co-packaging gallium nitride power device and chip
Publication Date: 2025.10.02 DONGKE SEMICON (ANHUI) CO LTD
  • US20250309220A1 patent drawing
  • US20250309220A1 patent drawing
  • US20250309220A1 patent drawing

AI summary

A half-bridge topology integration method for co-packaging a gallium nitride power device and a includes packaging a driving control module, a first power transistor and a second power transistor. The driving control module comprises a logic control circuit and a half-bridge driving circuit. The half-bridge driving circuit comprises a starting circuit, a high-side driver and a low-side driver. The logic control circuit is connected to the half-bridge driving circuit. The first power transistor and the second power transistor are connected in series, and the driving output of the half-bridge driving circuit is separately connected to driving ends of the first power transistor and of the second power transistor. The first power transistor and the second power transistor are alternately turned on and turned off. The logic control circuit, the half-bridge driving circuit, the first power transistor and the second power transistor are packaged in one chip.