GaN-HEMT Wafer Structure With Back-Gate Trap Control

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Solution Overview

Problem

Current semiconductor wafers using GaN-HEMTs suffer from current collapse due to buffer layer trap levels, which are not effectively addressed by existing solutions, leading to performance issues in high-power switching applications.

Innovation Solution

A semiconductor wafer structure with a substrate, a buffer layer, a first crystalline layer, and a second layer, where the first crystalline layer has a smaller bandgap than the second layer, and electrodes are positioned to facilitate electron and hole emission through space charge redistribution, ensuring higher electron emission speed than hole emission speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a buffer layer is used in GaN-HEMT structure, then manufacturing feasibility is improved, but current collapse occurs due to trap levels

Engineering Contradiction:
Improvemanufacturing feasibilityVSAvoidcurrent collapse
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

A back gate electrode is introduced as an intermediary component between the substrate and the buffer layer. This back gate serves as a mediator to control the electrical characteristics of the buffer layer, specifically to manage trap level effects and prevent current collapse while maintaining the buffer layer's manufacturing benefits

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the electrical parameters of the buffer layer by applying voltage to the back gate electrode. This modifies the trap level occupancy and electrical characteristics of the buffer layer, transforming it from a source of current collapse to a controllable component that enhances device performance

Inventive Principle:
Principle #35Parameter changes

2Speed

If high voltage stress is applied to switch to ON state, then switching speed is improved, but ON resistance increases due to current collapse

Engineering Contradiction:
Improveswitching speedVSAvoidON resistance
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The back gate electrode is used to preliminarily adjust the electrical state of the buffer layer before the main switching operation. By pre-conditioning the buffer layer through back gate voltage application, the trap levels are managed in advance, preventing current collapse during subsequent high-voltage switching operations

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The back gate electrode applies a preliminary counteracting effect to prevent current collapse before it occurs. By controlling the trap level occupancy in advance through back gate voltage, the invention counteracts the harmful effects that would otherwise occur during high-voltage stress switching

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces current collapse phenomena, enabling high-performance semiconductor devices with stable current flow and reduced ON resistance, thus improving the reliability and efficiency of power switching operations.

Implementation Method 1

space charge redistribution, for emitting electrons and holes from a bandgap of a crystal positioned in the spatial region

Methodology Applied
Scientific EffectSpace charge redistribution:

Implementation Method 2

electron emission speed in the space charge redistribution

Methodology Applied
Scientific EffectElectron emission:

Implementation Method 3

hole emission speed

Methodology Applied
Scientific EffectHole emission:

Data Source

PatentUS12112945B2Semiconductor wafer, electronic device, method of performing inspection on semiconductor wafer, and method of manufacturing electronic device
Publication Date: 2024.10.08 SUMITOMO CHEM CO LTD
  • US12112945B2 patent drawing
  • US12112945B2 patent drawing
  • US12112945B2 patent drawing

AI summary

A semiconductor substrate in includes a buffer layer and a first crystalline layer. A bandgap of the first crystalline layer is smaller than a bandgap of a second layer. When a semiconductor wafer is formed as a transistor wafer, a channel of a transistor is formed at or near an interface between the first crystalline layer and the second layer. With a first electrode and a second electrode provided and a third electrode provided, when space charge redistribution, for emitting electrons and holes from a bandgap of a crystal positioned in the spatial region, is achieved by applying negative voltage to the third electrode or by applying positive voltage to the second electrode with the first electrode serving as a reference, an electron emission speed in the space charge redistribution is higher than a hole emission speed.