GaN HEMT Barrier Layer Structure for Normally-Off Gate Formation

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Solution Overview

Problem

Conventional methods for fabricating GaN-based high electron mobility transistors (HEMTs) face challenges in maintaining the integrity of the threshold voltage and channel region during the etching process, leading to suboptimal 'normally off' operation and potential damage to the device structure.

Innovation Solution

A method involving the formation of a patterned mask on the barrier layer to define the gate electrode location, followed by the creation of a second barrier layer adjacent to the mask, and subsequent formation of the gate, source, and drain electrodes, while adjusting the thickness and aluminum concentration of the barrier layers to achieve a 'normally off' operation mode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional etching process is used to form gate electrode, then gate electrode can be formed, but the integrity of channel region and threshold voltage deteriorates

Engineering Contradiction:
Improvegate electrode formationVSAvoidchannel region integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The barrier layer is segmented into two distinct parts: a first barrier layer that remains intact to preserve the channel region and threshold voltage, and a second barrier layer that is selectively removed to enable gate electrode formation. This segmentation allows the etching process to form the gate electrode without damaging the underlying channel structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second barrier layer is extracted or removed from the structure adjacent to the mask, creating a localized region where the gate electrode can be formed without requiring aggressive etching that would damage the channel region. This extraction enables selective access for gate formation while protecting critical areas.

Inventive Principle:
Principle #2Taking out (Extraction)

2Ease of operation

If barrier layer thickness and aluminum concentration are adjusted, then 'normally off' operation is achieved, but manufacturing complexity increases

Engineering Contradiction:
Improvenormally off operation modeVSAvoidbarrier layer structure
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

Different regions of the barrier layer structure are assigned different properties: the first barrier layer maintains specific thickness and aluminum concentration to preserve threshold voltage and enable normally-off operation, while the second barrier layer has different characteristics optimized for gate electrode formation. This local differentiation achieves the desired operational mode without requiring complex overall device redesign.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The thickness and aluminum concentration parameters of the barrier layers are precisely controlled and adjusted to achieve the normally-off operation mode. By optimizing these parameters, the device achieves enhanced reliability and operational control while the manufacturing process remains manageable through standard semiconductor fabrication techniques.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250261395A1High electron mobility transistor with improved barrier layer
Publication Date: 2025.08.14 UNITED MICROELECTRONICS CORP
  • US20250261395A1 patent drawing
  • US20250261395A1 patent drawing
  • US20250261395A1 patent drawing

AI summary

A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a gate dielectric layer on the barrier layer; forming a work function metal layer on the gate dielectric layer; patterning the work function metal layer and the gate dielectric layer; forming a gate electrode on the work function metal layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.