Asymmetric GaN HEMT Barrier Layout for Bidirectional Switching
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Solution Overview
Problem
Gallium nitride (GaN) high electron mobility transistors (HEMTs) face challenges in balancing the performance of their dual functionalities due to symmetric design, which limits their on-resistance (Ron) performance and packing density, leading to increased costs and limited application in bidirectional switching.
Innovation Solution
Customizing the two-dimensional electron gas (2DEG) regions for each terminal of the GaN HEMT by using barrier layers with different material properties and doping concentrations to optimize the performance of each device, allowing for distinct operations as voltage blocking and switching devices, and reducing device pitch for improved packing density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If homogenous epitaxial layers with identical layout dimensions are used across both drain and source regions, then the device achieves bi-directional conduction capability, but the on-resistance increases compared to single-directional devices
Solution Approach 1:
The patent applies local quality by creating asymmetric device structures where the first device has different layout dimensions, barrier layer aluminum mole fraction, and 2DEG density compared to the second device. This allows each device region to be optimized for its specific function while maintaining bi-directional operation capability.
Solution Approach 2:
The patent implements asymmetry by deliberately designing unequal source-drain spacing, different barrier layer compositions, and varying 2DEG densities in the two device regions. This asymmetric design enables one device to function as a voltage blocking device with high breakdown voltage while the other operates as a switching device with low on-resistance.
2Reliability
If symmetric design is used for bi-directional GaN HEMT, then both drain terminals have equal high voltage capability, but the on-resistance increases and packing density decreases
Solution Approach 1:
The patent segments the bi-directional device into two distinct functional regions: a first device optimized for voltage blocking with larger source-drain spacing and higher breakdown voltage, and a second device optimized for switching with smaller source-drain spacing and lower on-resistance. This segmentation allows independent optimization of each function.
Solution Approach 2:
The patent changes key parameters including source-drain spacing, barrier layer aluminum mole fraction, and 2DEG density between the two device regions. These parameter variations enable the first device to achieve high breakdown voltage while the second device achieves low on-resistance, improving overall packing density.
3Object-generated harmful factors
If barrier layers with different material properties are used to customize 2DEG regions, then on-resistance performance is enhanced, but device complexity increases
Solution Approach 1:
The patent applies local quality by implementing different barrier layer aluminum mole fractions in different device regions. The first device uses a barrier layer with aluminum mole fraction of 0.25-0.35 for high breakdown voltage, while the second device uses a barrier layer with aluminum mole fraction of 0.15-0.25 for low on-resistance switching.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the on-resistance performance, expands application programs, and reduces die size and cost by optimizing the performance of each device terminal, enabling more efficient bidirectional switching and higher packing density.
Implementation Method 1
2DEG is presented at the interface between barrier layer of AlxGa1-xN and channel layer of GaN due to spontaneous and piezoelectric polarization of two layers
Implementation Method 2
2DEG is presented at the interface between barrier layer of AlxGa1-xN and channel layer of GaN due to spontaneous and piezoelectric polarization of two layers
Data Source
AI summary
An embodiment provides a high electron mobility transistor (HEMT), including: a first drain terminal; a gate terminal; a second drain terminal; a channel layer, a portion of which forms a first device together with the first drain terminal and the gate terminal, and another portion of which forms a second device together with the second drain terminal and the gate terminal; and a first barrier layer forming a first two-dimensional electron gas (2DEG) region at an interface with the channel layer within the first device, and a second barrier layer forming a second 2DEG region at the interface with the channel layer within the second device, the first barrier layer and the second barrier layer including a barrier layer with different material properties.