GaN HEMT p-Type Buffer Layout for Low Leakage and Drain Lag
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Solution Overview
Problem
Gallium Nitride (GaN) high-electron mobility transistors (HEMTs) face challenges in forming p-type layers, which are necessary to eliminate drain lag effects and high leakage currents, due to difficulties in creating p-type layers by implantation, and existing solutions like deep level impurities lead to undesirable distortion and complexity.
Innovation Solution
A high-electron mobility transistor design that includes a substrate layer, a first buffer layer, a barrier layer, a source, a drain, a gate, and a p-type material layer with a length parallel to the substrate surface, where the p-type material layer is selectively formed in the substrate or buffer layer to avoid extending under the drain, thereby minimizing adverse effects on RF performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If deep level impurities such as Iron (Fe) are used in the buffer layer to minimize current flow through the buffer at high drain voltage conditions, then leakage current is reduced, but drain lag effect occurs leading to slow recovery of drain current and distortion
Solution Approach 1:
The patent changes the doping type parameter from n-type to p-type in the buffer layer, fundamentally altering the electrical properties to simultaneously reduce leakage current and eliminate drain lag effect. This parameter change transforms the buffer layer's behavior under high drain voltage conditions while maintaining fast recovery characteristics.
Solution Approach 2:
The patent creates a composite structure by combining p-type doped buffer layer with the surrounding n-type GaN layers, forming a heterostructure that leverages the unique properties of p-type GaN to achieve both low leakage and fast recovery, resolving the contradiction between these two performance metrics.
2Reliability
If high-purity buffer layers without Fe are used to eliminate drain lag effect, then drain current recovery is fast, but high leakage current flows through the buffer
Solution Approach 1:
The patent applies parameter change by introducing p-type doping to the buffer layer, which fundamentally alters both the leakage current characteristic and the recovery speed. This single parameter change simultaneously achieves fast recovery without Fe impurities while maintaining low leakage current through the p-type material's inherent properties.
3Reliability
If p-type layers are formed by implantation in GaN HEMTs to solve leakage and drain lag issues, then device performance improves, but manufacturing complexity increases due to difficulty in forming p-type layers
Solution Approach 1:
The patent changes the manufacturing approach by using in-situ doping during epitaxial growth instead of post-growth implantation. This parameter change in the doping method enables p-type layer formation to be integrated into the existing growth process, improving ease of manufacture while maintaining device performance benefits.
Data Source
AI summary
A high-electron mobility transistor includes a substrate layer, a first buffer layer provided on the substrate layer, a barrier layer provided on the first buffer layer, a source provided on the barrier layer, a drain provided on the barrier layer, and a gate provided on the barrier layer. The transistor further includes a p-type material layer having a length parallel to a surface of the substrate layer over which the first buffer layer is provided, the length of the p-type material layer being less than an entire length of the substrate layer. The p-type material layer is provided in one of the following: the substrate layer, or the first buffer layer. A process of making the high-electron mobility transistor is disclosed as well.